參數(shù)資料
型號(hào): HYE18P16161ACL85
廠商: INFINEON TECHNOLOGIES AG
英文描述: 16M Asynchronous/Page CellularRAM
中文描述: 1,600異步/頁(yè)的CellularRAM
文件頁(yè)數(shù): 23/33頁(yè)
文件大?。?/td> 641K
代理商: HYE18P16161ACL85
Data Sheet
23
V2.0, 2003-12-16
HYE18P16161AC(-/L)70/85
16M Asynch/Page CellularRAM
Functional Description
2.5
Asynchronous Write
Writing to the device in asynchronous mode is accomplished by asserting the Chip Select (CS1) and Write Enable
(WE) signals to low. If the Upper Byte (UB) control line is set active low then the upper word (DQ15 to DQ8) of the
data bus is written to the specified memory location. If the Lower Byte (LB) control line is set active low then the
lower word (DQ7 to DQ0) of the data bus is written to the specified memory location. Write operation takes place
when either one or both UB and LB is asserted low. The data is latched by the rising edge of either CS1, WE, or
UB/LB whichever signal comes first.
Figure 12
Asynchronous Write - WE Controlled (OE =
V
IH
or
V
IL
, ZZ =
V
IH
)
Figure 13
Asynchronous Write - CS1 Controlled (OE =
V
IH
or
V
IL
, ZZ =
V
IH
)
Don't Care
A20-A0
ADDRESS
CS1
WE
UB, LB
DQx OUT
t
CW
t
WR
t
WC
t
WP
t
AW
t
BW
Data Valid
DQx IN
t
DW
t
DH
t
AS
t
WHZ
t
OW
t
WPH
(note) A20 is “don’t care” in 16M CellularRAM
Don't Care
A20-A0
ADDRESS
CS1
WE
UB, LB
DQx OUT
t
CW
t
WR
t
WC
t
WP
t
AW
t
BW
Data Valid
DQx IN
t
DW
t
DH
t
AS
t
WHZ
t
CPH
(note) A20 is “don’t care” in 16M CellularRAM
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