參數(shù)資料
型號(hào): HYE18P32160AC-96
廠商: INFINEON TECHNOLOGIES AG
英文描述: 32M Synchronous Burst CellularRAM
中文描述: 32M的同步突發(fā)的CellularRAM
文件頁(yè)數(shù): 19/53頁(yè)
文件大?。?/td> 1426K
代理商: HYE18P32160AC-96
Data Sheet
19
V2.0, 2003-12-16
HYE18P32160AC(-/L)9.6/12.5/15
32M Synchronous Burst CellularRAM
Functional Description
2.2
Access To The Control Register Map
Write-only access to the control register map is enabled by applying the SCR command asserting the CRE-pin to
high. In combination with CRE set to high, Pin A19 designates the operation to one of either control registers.
Pin A19 set to low selects the Refresh Control Register (RCR), Pin A19 set to high addresses the Bus
Configuration Register (BCR).
Write and read access to the control registers is also available at S/W entry method. For details, please refer to
“Appendix B: S/W Register Entry Mode (“4-cycle method”)” on Page 51
.
Figure 5
The two Control Registers
Figure 6
Control Register Write in SRAM-Type Mode
Burst Length
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
BW
0
0
WP
WC
IMP
0
OM
Latency Mode
A19
1
A16
0
A17
0
A18
0
A20
0
PASR
A0
A1
A2
A3
A4
A5
A6
A7
A8
A18
A20
TCSR
PM
0
0
0
DPD
0
A19
0
0
0
0
0
0
0
0
0
0
A9
A10
A11
A12
A13
A14
A15
A16
A17
A19 is the selection address between BCR and RCR
Bus Control Register BCR
Refresh Control Register RCR
All '0' are reserved bits and must be set to zero.
(BCR.A6 has to be set to one)
0
1
Don't Care
A20-A0
OPCODE
CS
WE
UB, LB
DQx
CRE
A19
Initiate Control Register Access
Latch OPCODE on Address
Address BCR
ADV
(Latch Opcode)
Write Opcode
0(RCR), 1(BCR)
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