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| 型號(hào)： | HYE18P32160AC-96 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | 32M Synchronous Burst CellularRAM |
| 中文描述： | 32M的同步突發(fā)的CellularRAM |
| 文件頁數(shù)： | 26/53頁 |
| 文件大?。?/td> | 1426K |
| 代理商： | HYE18P32160AC-96 |
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HYE18P32160AC(-/L)9.6/12.5/15
32M Synchronous Burst CellularRAM
Functional Description
Data Sheet
26
V2.0, 2003-12-16
WP
10
w
WAIT Polarity
The WAIT polarity control bit allows the user to define the polarity of the WAIT output
signal. The WAIT output line is used during a synchronous read burst to signal when
the output data is invalid.
0
active low
1
active high (default)
WAIT Configuration
The WAIT signal configuration control bit specifies whether the WAIT signal is
asserted at the time of the delay or whether it is asserted one clock cycle in advance.
0
WAIT is asserted during the delay
1
WAIT is asserted one data cycle before the delay (default)
Output Impedance
For adaptation to different system characteristics the output impedance can be
configured.
0
Full drive for 50
systems (default)
1
Quarter drive
Burst Wrap
The burst wrap control bit defines whether there is a wrap around within a burst
access or not. In case of fixed 8-word burst length, this means that after word7, word0
is going to be output in wrap mode.
In case of continuous burst mode the internal address counter will wrap from the last
address, 1FFFFF
H
to 000000
H
regardless of the setting.
Please note this setting is only used for burst read mode, since burst write mode is
always continuous.
0
wrap
1
no wrap (default)
Burst Length (Burst Read only)
Via the burst length field the user can select between fixed burst lengths of 4, 8, and
16 and any arbitrary burst length by choosing the continuous mode option. In
continuous mode the burst length is controlled by the active low period of the read
control lines CS and OE.
Please note this setting is only used for burst read mode. Burst write mode is always
continuous independent of this register setting.
001
4-word burst
010
8-word burst
011
16-word burst
111
continuous (default)
Reserved
must be set to ‘0’
WC
8
w
IMP
5
w
BW
3
w
BL
[2:0]
w
Res
20,
[18:16],
14, 9, 7,
4
w
1) w: write-only access
Field
Bits
Type
1)
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYE18P32160ACL125 | JT 8C 8#16 SKT WALL RECP |
| HYE18P32160ACL15 | JT 23C 21#20 2#16 SKT PLUG |
| HYE18P32160ACL96 | Circular Connector; MIL SPEC:MIL-DTL-38999 Series II; Body Material:Metal; Series:JT; No. of Contacts:11; Connector Shell Size:18; Connecting Termination:Crimp; Circular Shell Style:Straight Plug; Body Style:Straight RoHS Compliant: No |
| HYE18P32160AC-125 | M39012 MIL RF CONNECTOR |
| HYE18P32160AC-15 | M39012 MIL RF CONNECTOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYE18P32160ACL125 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:32M Synchronous Burst CellularRAM |
| HYE18P32160ACL15 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:32M Synchronous Burst CellularRAM |
| HYE18P32160ACL96 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:32M Synchronous Burst CellularRAM |
| HYE18P32161AC | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:32M Asynchronous/Page CellularRAM |
| HYE18P32161AC-70 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:32M Asynchronous/Page CellularRAM |
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