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參數(shù)資料
| 型號(hào)： | HYM72V1630GS-60 |
| 廠商： | SIEMENS A G |
| 元件分類： | DRAM |
| 英文描述： | 16M x 72-Bit Dynamic RAM Module |
| 中文描述： | 16M X 72 FAST PAGE DRAM MODULE, 60 ns, DMA168 |
| 封裝： | DIMM-168 |
| 文件頁(yè)數(shù)： | 7/11頁(yè) |
| 文件大?。?/td> | 69K |
| 代理商： | HYM72V1630GS-60 |
Semiconductor Group
7
HYM72V1620/30GS-50/-60
16M x 72-ECC Module
AC Characteristics
(note: 5,6,7,8)
T
A
= 0 to 70 °C,
V
CC
= 3.3
±
0.3 V
Parameter
Symbol
-50
-60
Unit
Note
min.
max.
min.
max.
common parameters
Random read or write cycle time
t
RC
t
RP
t
RAS
t
CAS
t
ASR
t
RAH
t
ASC
t
CAH
t
RCD
t
RAD
t
RSH
t
CSH
t
CRP
t
T
t
REF
90
–
110
–
ns
RAS precharge time
30
–
40
–
ns
RAS pulse width
50
100k
60
100k
ns
CAS pulse width
13
100k
15
100k
ns
Row address setup time
5
–
5
–
ns
9
Row address hold time
8
–
8
–
ns
10
Column address setup time
2
–
2
–
ns
11
Column address hold time
15
–
15
–
ns
9
RAS to CAS delay time
16
32
18
40
12
RAS to column address delay time
11
20
13
25
ns
12
RAS hold time
CAS hold time
18
48
–
–
20
58
–
–
ns
ns
9
10
CAS to RAS precharge time
10
–
10
–
ns
9
Transition time (rise and fall)
3
30
3
30
ns
7
Refresh period
–
128
–
128
ms
Read Cycle
Access time from RAS
t
RAC
t
CAC
t
AA
t
OEA
t
RAL
t
RCS
t
RCH
t
RRH
–
50
–
60
ns
13,14
Access time from CAS
–
18
–
20
ns
9,13,14
Access time from column address
–
30
–
35
ns
9,13, 15
OE access time
–
18
–
20
ns
9,13
Column address to RAS lead time
30
–
35
–
ns
9
Read command setup time
2
–
2
–
ns
11
Read command hold time
2
–
2
–
ns
11,16
Read command hold time referenced
to RAS
0
–
0
–
ns
16
CAS to output in low-Z
t
CLZ
t
OFF
2
–
2
–
ns
11,13
Output buffer turn-off delay
–
18
–
20
ns
9,17
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| HYM72V1635GS-50 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:16M x 72-Bit EDO-DRAM Module |
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| HYM72V1645GU-60 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 16M x 64-Bit EDO-DRAM Module 3.3V 16M x 72-Bit EDO-DRAM Module |
| HYM72V1645GU-70 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x72 EDO Page Mode DRAM Module |
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