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參數(shù)資料
| 型號(hào)： | HYMR212818H |
| 英文描述： | 128Mx18|2.5V|40|x8|Direct RDRAM - 256MB RIMM |
| 中文描述： | 128Mx18 | 2.5V的| 40 | x8 |直接RDRAM的- 256MB的RIMM的 |
| 文件頁數(shù)： | 15/18頁 |
| 文件大小： | 291K |
| 代理商： | HYMR212818H |
HYMR2xxx16(18)H
Rambus Module Serial Presence Detect
Rev. 1.1/July 01
3
SERIAL PRESENCE DETECT
BYTE
NUMBER
FUNCTION
DESCRIPTION
FUNCTION
Hex VALUE
NOTE
-840
-845
-745
-653
-840
-845
-745
-653
BYTE0
SPD Revision Level
SPD Revision 1.0
02h
BYTE1
Total # of Bytes in the SPD
256Bytes
08h
BYTE2
Device Type
Direct RDRAM
01h
BYTE3
Module Type
RIMM
01h
BYTE4
Row Address bits[0:3], Column Address bits[0:3]
9bits, 7bits
97h
BYTE5
Bank Address bits and Type
32Banks (5bank bits)
C5h
BYTE6
Refresh Bank bits
32 Refresh Bank Sets
05h
BYTE7
Refresh Reriod (tREF)
32ms
20h
BYTE8
Protocol Version
Protocol Version 1
02h
BYTE9
Miscellaneous Device Configuration Field
DQS=1.5, no-LP, S28, S3
05h
BYTE10
Minimum Precharge to RAS time(tRP-R,Min)
8cycles
08h
BYTE11
Minimum RAS to Precharge time(tRAS-R,Min)
20cycles
14h
BYTE12
Minimum RAS to CAS time(tRCD-R,Min)
8cycles
10cycles
8cycles
8cycles
08h
0Ah
08h
08h
BYTE13
Minimum RAS to RAS time(tRR-R,Min)
8cycles
08h
BYTE14
Minimum Precharge to Precharge time(tPP-R,Min)
8cycles
08h
BYTE15
Min tCYCLE for RangeA
2.50ns
2.80ns
3.33ns
13h
15h
1Ah
BYTE16
Max tCYCLE for RangeA
3.83ns
1Eh
BYTE17
tCDLY Range for RangeA
5tCYCLE ~ 9tCYCLE
59h
BYTE18
tCLS and tCAS Range for RangeA
2tCYCLE for tCLS & tCAS
AAh
BYTE19
Min tCYCLE for RangeB
Reserved
00h
BYTE20
Max tCYCLE for Range
B
Reserved
00h
BYTE21
tCDLY Range for RangeB
Reserved
00h
BYTE22
tCLS and tCAS Range for RangeB
Reserved
00h
BYTE23
Min tCYCLE for RangeC
Reserved
00h
Max tCYCLE for Range
C
Reserved
00h
BYTE25
tCDLY Range for RangeC
Reserved
00h
BYTE26
tCLS and tCAS Range for RangeC
Reserved
00h
BYTE27
Min tCYCLE for RangeD
Reserved
00h
BYTE28
Max tCYCLE for Range
D
Reserved
00h
BYTE29
tCDLY Range for RangeD
Reserved
00h
BYTE30
tCLS and tCAS Range for RangeD
Power Down Exit Max. time, PhaseA(tPD-
NXA,Max)
Power Down Exit Max. time, PhaseB(tPD-
NXB,Max)
Nap Exit Max.time, PhaseA(tNAPXA,Max)
Reserved
00h
BYTE31
4us
04h
BYTE32
9000tCYCLE
8Dh
BYTE33
50ns
32h
BYTE34
Nap Exit Max.time, PhaseB(tNAPXB,Max)
40ns
28h
BYTE35
fIMIN[11:8],
fIMAX[11:8]
261MHz,
400MHz
261MHz,
357MHz
261MHz,
300MHz
11h
BYTE36
fIMIN[7:0]
261MHz
05h
BYTE37
fIMAX[7:0]
400MHz
357MHz
300MHz
90h
65h
2Ch
BYTE38
ODF Mapping
Reserved
00h
BYTE39
Max time between Current Control(tCCTRL,Max)
100ms
64h
BYTE40
Max time between Temp. Calibration(tTEMP,Max)
Max time between Temp. Calibration Enable and
Command (tTCEN,Min)
Maximum RAS to Precharge time(tRAS-R,Max)
Maximum time that a Device can stay in Nap
Mode (tNLIMIT,Max)
100ms
64h
BYTE41
150tCYCLE
96h
BYTE42
64us
40h
BYTE43
10us
0Ah
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