參數(shù)資料
型號: HYS 64V8301GU
廠商: SIEMENS AG
英文描述: 3.3 V 8M *64/72-Bit SDRAM Modules(3.3 V 8M×64/72-Bit 同步動態(tài)RAM 模塊)
中文描述: 3.3伏800萬* 64/72-Bit內(nèi)存模塊(3.3伏8米× 64/72-Bit同步動態(tài)內(nèi)存模塊)
文件頁數(shù): 6/12頁
文件大?。?/td> 92K
代理商: HYS 64V8301GU
HYS 64V8301GU
SDRAM-Modules
Data Book
6
12.99
Operating Currents
1
T
A
= 0 to 70
°
C,
V
DD
= 3.3 V
±
0.3 V
(Recommended Operating Conditions unless otherwise noted)
Parameter
Test Condition Symbol
-7.5
-8
Unit
Note
max.
Operating current
t
RC
=
t
RC(MIN.)
,
t
CK
=
t
CK(MIN.)
Outputs open, Burst Length = 4, CL=3
All banks operated in random access,
all banks operated in ping-pong
manner to maximize gapless data
access
I
CC1
160
150
mA
1)
Precharge standby current
in Power Down Mode
CS =
V
IH (MIN.)
, CKE
V
IL(MAX.)
Precharge stand-by current
in Non Power Down Mode
CS =
V
IH (MIN.)
, CKE
V
IH(MIN.)
No operating current
t
CK
= min., CS =
V
IH (MIN.)
,
active state (max. 4 banks)
t
CK
= min
I
CC2P
1.5
mA
1)
t
CK
= min
I
CC2N
40
35
mA
1)
CKE
V
IH(MIN.)
CKE
V
IL(MAX.)
I
CC3N
I
CC3P
50
45
mA
1)
10
10
mA
1)
Burst Operating Current
t
CK
= min
Read command cycling
I
CC4
100
90
mA
1, 2)
Auto Refresh Current
t
CK
= min
Auto Refresh command cycling
I
CC5
230
210
mA
1)
Self Refresh Current
Self Refresh Mode
CKE = 0.2 V
I
CC6
1.5
1.5
mA
1)
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