參數(shù)資料
型號: HYS64D16020GDL-8-A
廠商: INFINEON TECHNOLOGIES AG
英文描述: Unbuffered DDR SDRAM SO Modules
中文描述: 無緩沖DDR SDRAM的蘇模塊
文件頁數(shù): 19/22頁
文件大?。?/td> 963K
代理商: HYS64D16020GDL-8-A
HYS64D16020GD(L)-[7/8]-A
Unbuffered DDR SDRAM SO Modules
SPD Contents
Data Sheet
19
Rev. 1.02, 2004-01
11042003-YIV7-VK6M
4
SPD Contents
Table 11
Byte#
SPD Codes for PC2100 & PC1600
Description
128MB
x64
2ranks
–7
HEX.
80
08
07
0C
09
02
40
00
04
70
75
128MB
x64
2ranks
–8
HEX.
80
08
07
0C
09
02
40
00
04
80
80
0
1
2
3
4
5
6
7
8
9
10
Number of SPD Bytes
Total Bytes in Serial PD
Memory Type
Number of Row Addresses
Number of Column Addresses
Number of DIMM Ranks
Module Data Width
Module Data Width (cont’d)
Module Interface Levels
SDRAM Cycle Time at CL = 2.5
Access Time from Clock at
CL = 2.5
DIMM config
Refresh Rate/Type
SDRAM Width, Primary
Error Checking SDRAM Data
Witdh
Minimum Clock Delay for Back-
to-Back Random Column
Address
Burst Length Supported
Number of SDRAM Ranks
Supported CAS Latencies
CS Latencies
WE Latencies
SDRAM DIMM Module Attributes unbuffered
SDRAM Device Attributes:
General
Min. Clock Cycle Time at CAS
Latency = 2
Access Time from Clock for
CL = 2
Minimum Clock Cycle Time for
CL = 1.5
Access Time from Clock at
CL = 1.5
Minimum Row Precharge Time
128
256
DDR-SDRAM
12
9
2
×
64
0
SSTL_2.5
7 ns/8 ns
0.75 ns/0.8 ns
11
12
13
14
non-ECC/ECC
Self-Refresh 15.6 ms
×
16
na
00
80
10
00
02
80
10
00
15
t
CCD
= 1 CLK
01
01
16
17
18
19
20
21
22
2, 4 & 8
4
CAS latency = 2 & 2.5
CS latency = 0
Write latency = 1
0E
04
0C
01
02
20
C1
0E
04
0C
01
02
20
C1
Concurrent Auto Precharge,
weak driver
7.5 ns/10 ns
23
75
A0
24
0.75 ns/0.8 ns
75
80
25
not supported
00
00
26
not supported
00
00
27
20 ns
50
50
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