參數(shù)資料
型號: HYS64D32000GU-8-B
廠商: INFINEON TECHNOLOGIES AG
英文描述: 184-Pin Unbuffered Dual-In-Line Memory Modules
中文描述: 184引腳緩沖雙列內(nèi)存模組
文件頁數(shù): 34/51頁
文件大?。?/td> 1356K
代理商: HYS64D32000GU-8-B
HYS[64/72]D[16x01/32x00/64x20][G/E]U-[5/6/7/8]-B
Unbuffered DDR SDRAM Modules
SPD Contents
Data Sheet
34
V1.1, 2003-07
36 to 40
41
Superset Information
Minimum Core Cycle
Time
t
RC
Min.
Auto
Cmd Cycle Time
t
FRC
Maximum Clock Cycle
Time
t
CK
Max. DQS-DQ Skew
t
DQSQ
X-Factor tQHS
Superset Information
SPD Revision
Checksum for Bytes 0
- 62
Manufacturers
JEDEC ID Codes
Manufacturer
Module
Location
Module Part Number
Module
Code
Module Manufacturing
Date
Module Serial Number –
128 to 255 open for Customer
use
65 ns
00
41
00
41
00
41
00
41
00
41
42
Refresh
75 ns
4B
4B
4B
4B
4B
43
12 ns
30
30
30
30
30
44
0.5 ns
32
32
32
32
32
45
46 to 61
62
63
0.75 ns
Revision 0.0
75
00
00
99
75
00
00
B2
75
00
00
C4
75
00
00
B3
75
00
00
C4
64
C1
C1
C1
C1
C1
65 to 71
72
Infineon
Infineon
Infineon
Infineon
Infineon
Assembly
73 to 90
91 to 92
Revision
93 to 94
95 to 98
99 to 127
Table 18
SPD Codes for PC2100 Modules “–7”
(cont’d)
P
H
128MB
×
64
1 rank
HEX
H
256MB
×
64
1 rank
HEX
H
H
256MB
×
72
1 rank
HEX
H
512MB
×
64
2 ranks
HEX
H
512MB
×
72
2 ranks
HEX
Byte
Description
相關(guān)PDF資料
PDF描述
HYS72D32000GU-8-B 184-Pin Unbuffered Dual-In-Line Memory Modules
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HYS64D16301GU-6-B 184-Pin Unbuffered Dual-In-Line Memory Modules
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