參數(shù)資料
型號: HYS64D32000GU-8-B
廠商: INFINEON TECHNOLOGIES AG
英文描述: 184-Pin Unbuffered Dual-In-Line Memory Modules
中文描述: 184引腳緩沖雙列內(nèi)存模組
文件頁數(shù): 39/51頁
文件大?。?/td> 1356K
代理商: HYS64D32000GU-8-B
Data Sheet
39
V1.1, 2003-07
HYS[64/72]D[16x01/32x00/64x20][G/E]U-[5/6/7/8]-B
Unbuffered DDR SDRAM Modules
SPD Contents
18
Supported CAS
Latencies
CS Latencies
WE Latencies
SDRAM DIMM Module
Attributes
SDRAM Device
Attributes: General
Min. Clock Cycle Time
at CAS Latency = 2
Access Time from
Clock for
CL = 2
Minimum Clock Cycle
Time for CL = 1.5
Access Time from
Clock at
CL = 1.5
Minimum Row
Precharge Time
Minimum Row Act. to
Row Act. Delay
t
RRD
Minimum RAS to CAS
Delay
t
RCD
Minimum RAS Pulse
Width
t
RAS
Module Bank Density
(per Bank)
Addr. and Command
Setup Time
Addr. and Command
Hold Time
Data Input Setup Time 0.45 ns
Data Input Hold Time
CAS latency = 2 & 2.5 0C
0C
0C
0C
0C
19
20
21
CS latency = 0
Write latency = 1
unbuffered
01
02
20
01
02
20
01
02
20
01
02
20
01
02
20
22
C0
C0
C0
C0
C0
23
7.5 ns
75
75
75
75
75
24
0.70 ns
70
70
70
70
70
25
not supported
00
00
00
00
00
26
not supported
00
00
00
00
00
27
18 ns
48
48
48
48
48
28
12 ns
30
30
30
30
30
29
18 ns
48
48
48
48
48
30
42 ns
2A
2A
2A
2A
2A
31
128 MByte/256 MByte 20
40
40
40
40
32
0.75 ns
75
75
75
75
75
33
0.75 ns
75
75
75
75
75
34
35
45
45
45
45
45
45
45
45
45
45
0.45 ns
Table 20
SPD Codes for PC2700 Modules “–6”
(cont’d)
P
H
128MB
×
64
1 rank
HEX
H
256MB
×
64
1 rank
HEX
H
256MB
×
72
1 rank
HEX
H
512MB
×
64
2 ranks
HEX
H
512MB
×
72
2 ranks
HEX
Byte
Description
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