參數(shù)資料
型號: HYS64D32000GU-8-B
廠商: INFINEON TECHNOLOGIES AG
英文描述: 184-Pin Unbuffered Dual-In-Line Memory Modules
中文描述: 184引腳緩沖雙列內(nèi)存模組
文件頁數(shù): 35/51頁
文件大小: 1356K
代理商: HYS64D32000GU-8-B
Data Sheet
35
V1.1, 2003-07
HYS[64/72]D[16x01/32x00/64x20][G/E]U-[5/6/7/8]-B
Unbuffered DDR SDRAM Modules
SPD Contents
Table 19
SPD Codes for PC2100 Modules “–7F”
P
H
256MB
×
72
1 rank
HEX
80
08
07
0D
0A
H
512MB
×
72
1 rank
HEX
80
08
07
0D
0A
Byte
0
1
2
3
4
Description
Number of SPD Bytes
Total Bytes in Serial PD
Memory Type
Number of Row Addresses
Number of Column
Addresses
Number of DIMM Banks
Module Data Width
Module Data Width (cont’d)
Module Interface Levels
SDRAM Cycle Time at
CL = 2.5
Access Time from Clock at
CL = 2.5
DIMM config
Refresh Rate/Type
SDRAM Width, Primary
Error Checking SDRAM Data
Witdh
Minimum Clock Delay for
Back-to-Back Random
Column Address
Burst Length Supported
Number of SDRAM Banks
Supported CAS Latencies
CS Latencies
WE Latencies
SDRAM DIMM Module
Attributes
SDRAM Device Attributes:
General
128
256
DDR-SDRAM
13
9/10
5
6
7
8
9
1/2
×
64/
×
72
0
SSTL_2.5
7 ns
01
48
00
04
70
02
48
00
04
70
10
0.75 ns
75
75
11
12
13
14
non-ECC/ECC
Self-Refresh 7.8
μ
s
×
16
/ ×
8
na
/ ×
8
02
82
08
08
02
82
08
08
15
t
CCD
= 1 CLK
01
01
16
17
18
19
20
21
2, 4 & 8
4
CAS latency = 2 & 2.5
CS latency = 0
Write latency = 1
unbuffered
0E
04
0C
01
02
20
0E
04
0C
01
02
20
22
C0
C0
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