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參數(shù)資料
| 型號： | HYS64V4220GCDL |
| 廠商： | SIEMENS AG |
| 英文描述： | 3.3V SDRAM Modules(3.3V SDRAM 模塊) |
| 中文描述： | 3.3V的內(nèi)存模塊（3.3V的內(nèi)存模塊） |
| 文件頁數(shù)： | 12/18頁 |
| 文件大?。?/td> | 133K |
| 代理商： | HYS64V4220GCDL |
HYS 64Vx20(2)0GCDL
144-pin SO-DIMM SDRAM Modules
Data Book
12
12.99
SPD-Table for PC100 2-2-2 SO-DIMM Modules
Byte#
Description
SPD Entry Value
Hex
4
-
8
-
80
08
04
0C
08
02
40
00
01
A0
60
00
80
10
00
01
1
-
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Number of SPD Bytes
Total Bytes in Serial PD
Memory Type
Number of Row Addresses (without BS)
Number of Column Addresses
Number of DIMM Banks
Module Data Width
Module Data Width (cont’d)
Module Interface Levels
SDRAM Cycle Time at CL = 3
SDRAM Access Time from Clock at CL = 3
DIMM Config (Error Det/Corr.)
Refresh Rate/Type
SDRAM Width, Primary
Error Checking SDRAM Data Width
Minimum Clock Delay for Back-to-Back
Random Column Address
Burst Length Supported
Number of SDRAM Banks
Supported CAS Latencies
CS Latencies
WE Latencies
SDRAM DIMM Module Attributes
SDRAM Device Attributes: General
SDRAM Cycle Time at CL = 2
SDRAM Access Time from Clock at CL = 2
SDRAM Cycle Time at CL = 1
SDRAM Access Time from Clock at CL = 1
Minimum Row Precharge Time
Minimum Row Active to Row Active Delay
Minimum RAS to CAS Delay
Minimum RAS Pulse Width
Module Bank Density (per bank)
SDRAM Input Setup Time
SDRAM Input Hold Time
SDRAM Data Input Setup Time
SDRAM Data Input Hold Time
128
256
SDRAM
–
–
1/2
64
0
LVTTL
10.0 ns
6.0 ns
none
Self-Refresh, 15.6
μ
s
x16
n/a/x8
t
CCD
= 1 CLK
08
01
09
02
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
1, 2, 4, 8 & full page
2
2, & 3
CS latency = 0
Write latency = 0
non buffered/non reg.
V
DD
tol +/– 10%
10.0 ns
6.0 ns
not supported
not supported
20 ns
16 ns
20 ns
45 ns
32 MB/64 MB
2 ns
1 ns
2 ns
1 ns
8F
04
06
01
01
00
0E
A0
60
FF
FF
14
10
14
2D
08
20
10
20
10
08
10
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HYS64V8220GCDL | 3.3V SDRAM Modules(3.3V SDRAM 模塊) |
| HYS64V16220GDL-7 | 144 pin SO-DIMM SDRAM Modules |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYS64V4220GCDL-7.5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 SDRAM Module |
| HYS64V4220GCDL-8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 SDRAM Module |
| HYS64V4220GU-10 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 2M x 64/72-Bit 1 BANK SDRAM Module 3.3V 4M x 64/72-Bit 2 BANK SDRAM Module |
| HYS64V4220GU-8 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 2M x 64/72-Bit 1 BANK SDRAM Module 3.3V 4M x 64/72-Bit 2 BANK SDRAM Module |
| HYS64V4220GU-8-3 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:3.3V 2M x 64/72-Bit 1 BANK SDRAM Module 3.3V 4M x 64/72-Bit 2 BANK SDRAM Module |
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