參數(shù)資料
型號(hào): HYS72D64020GU-8-B
廠商: INFINEON TECHNOLOGIES AG
英文描述: 184-Pin Unbuffered Dual-In-Line Memory Modules
中文描述: 184引腳緩沖雙列內(nèi)存模組
文件頁(yè)數(shù): 32/51頁(yè)
文件大?。?/td> 1356K
代理商: HYS72D64020GU-8-B
HYS[64/72]D[16x01/32x00/64x20][G/E]U-[5/6/7/8]-B
Unbuffered DDR SDRAM Modules
SPD Contents
Data Sheet
32
V1.1, 2003-07
Table 18
SPD Codes for PC2100 Modules “–7”
P
H
128MB
×
64
1 rank
HEX
80
08
H
256MB
×
64
1 rank
HEX
80
08
H
H
256MB
×
72
1 rank
HEX
80
08
H
512MB
×
64
2 ranks
HEX
80
08
H
512MB
×
72
2 ranks
HEX
80
08
Byte
0
1
Description
Number of SPD Bytes 128
Total Bytes in Serial
PD
Memory Type
Number of Row
Addresses
Number of Column
Addresses
Number of DIMM
Banks
Module Data Width
Module Data Width
(cont’d)
Module Interface
Levels
SDRAM Cycle Time at
CL = 2.5
Access Time from
Clock at
CL = 2.5
DIMM config
Refresh Rate/Type
SDRAM Width,
Primary
Error Checking
SDRAM Data Witdh
Minimum Clock Delay
for Back-to-Back
Random Column
Address
Burst Length
Supported
Number of SDRAM
Banks
256
2
3
DDR-SDRAM
13
07
0D
07
0D
07
0D
07
0D
07
0D
4
9/10
09
0A
0A
0A
0A
5
1/2
01
01
01
02
01
6
7
×
64/
×
72
0
40
00
40
00
48
00
40
00
48
00
8
SSTL_2.5
04
04
04
04
04
9
7 ns
70
70
70
70
70
10
0.75 ns
75
75
75
75
75
11
12
13
non-ECC/ECC
Self-Refresh 7.8
μ
s
×
16
/ ×
8
00
82
10
00
82
08
02
82
08
00
82
08
02
82
08
14
na
/ ×
8
00
00
08
00
08
15
t
CCD
= 1 CLK
01
01
01
01
01
16
2, 4 & 8
0E
0E
0E
0E
0E
17
4
04
04
04
04
04
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