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| 型號： | I843034AY-06 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 750 MHz, PROC SPECIFIC CLOCK GENERATOR, PQFP48 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-48 |
| 文件頁數(shù)： | 1/21頁 |
| 文件大小： | 976K |
| 代理商： | I843034AY-06 |
FEMTOCLOCKS MULTI-RATE 3.3V
LVPECL FREQUENCY SYNTHESIZER
ICS843034-06
IDT / ICS 3.3V LVPECL FREQUENCY SYNTHESIZER
1
ICS843034AY-06 REV. A MARCH 7, 2007
PRELIMINARY
GENERAL DESCRIPTION
The ICS843034-06 is a general purpose, low phase
noise LVPECL synthesizer which can generate
frequencies for a wide variety of applications. The
ICS843034-06 has a 4:1 input Multiplexer from
which the following inputs can be selected: one
differential input, one single-ended input, or two
crystal oscillators, thus making the device ideal for frequency
translation or frequency generation. The ICS843034-06 has
dual LVPECL outputs that may be programmed for ÷2, ÷4 or
÷5 from the VCO frequency. The ICS843034-06 also supplies
a buffered copy of the reference clock or crystal frequency on
the single-ended REF_OUT pin which can be enabled or
disabled (disabled by default). The output frequency can be
programmed using either a serial or parallel programming
interface. This device supports Spread Spectrum Clocking
(SSC) for EMI reduction.
FEATURES
Dual differential 3.3V LVPECL outputs
4:1 Input Mux:
One differential input
One single-ended input
Two crystal oscillator interfaces
CLK, nCLK pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL
REF_CLK accepts LVCMOS or LVTTL input levels
Output frequency range: 35MHz to 750MHz
Crystal input frequency range: 12MHz to 40MHz
VCO range: 560MHz to 750MHz
Supports Spread Spectrum Clocking (SSC)
Parallel or serial interface for programming feedback divider
and output dividers
RMS phase jitter at 333.33MHz, using a 22.222MHz crystal
(12kHz to 20MHz): 1.37ps (typical), SSC - Off
3.3V supply mode
0°C to 70°C ambient operating temperature
Industrial temperature available upon request
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
HiPerClockS
ICS
PIN ASSIGNMENT
48 47 46 45 44 43 42 41 40 39 38 37
13 14 15 16 17 18 19 20 21 22 23 24
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
M8
RESERVED
OE_REF
OE_A
OE_B
VCC
NA0
NA1
NA2
VEE
XTAL_OUT1
XTAL_IN1
XTAL_OUT0
XTAL_IN0
REF_CLK
SEL1
SEL0
VCCA
S_LOAD
S_DATA
S_CLOCK
MR
CLK
nCLK
nP_LO
A
D
VCO_SEL
M0
M1
M2
M3
M4
M5
M6
M7
ICS843034-06
48-Pin LQFP
7mm x 7mm x 1.4mm
package body
Y Package
Top View
V
EE
nc
V
CCO
_
REF
REF_OUT
V
CCO
_
B
nFOUTB0
FOUTB0
V
CCO
_
A
nFOUT
A0
FOUT
A
0
V
CC
TEST
OSC
÷M
0
1
011
÷
4
100
÷
001
2
÷
5
OSC
VCO
00
01
10
11
OE_A
OE_B
MR
VCO_SEL
CLK
nCLK
SEL1
SEL0
REF_CLK
OE_REF
S_LOAD
S_DATA
S_CLOCK
nP_LOAD
M8:M0
NA2:NA0
XTAL_IN0
XTAL_OUT0
XTAL_IN1
XTAL_OUT1
FOUTA0
nFOUTA0
FOUTB0
nFOUTB0
REF_OUT
TEST
VCCO_REF
VCCO_B
VCCO_A
Pullup/Pulldown
Pullup
Pulldown
Configuration
Interface
Logic
Phase
Detector
NA2 Pulldown, NA1:0 Pullup
M0:M4 M6:M8 Pulldown, M5 Pullup
BLOCK DIAGRAM
The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product characterization
and/or qualification. Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.
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