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參數(shù)資料
| 型號： | IBM25NPE405L-3FA266CZ |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 266 MHz, RISC PROCESSOR, PBGA324 |
| 封裝： | 23 X 23 MM, PLASTIC, EBGA-324 |
| 文件頁數(shù)： | 52/52頁 |
| 文件大?。?/td> | 907K |
| 代理商： | IBM25NPE405L-3FA266CZ |
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Preliminary
PowerNP NPe405L Embedded Processor Data Sheet
9
Programmable access timing per device
- 0–255 wait states for non-bursting devices
- 0 –31 Burst Wait States for first access and up to 7 Wait States for subsequent accesses
- Programmable chip select assertion/negation relative to driving address bus
- Programmable output and write-enable assertion/negation relative to assertion of chip select
Programmable address mapping
Peripheral device wait via “Ready”
DMA Controller
Supports the following transfers:
- Memory-to-memory transfers
- Buffered peripheral to memory transfers
- Buffered memory to peripheral transfers
Four channels
Scatter/Gather capability for programming multiple DMA operations
8-, 16-, 32-bit peripheral support (OPB and external bus attached)
32-bit addressing
Address increment or decrement
Internal 32-byte data buffering capability
Supports internal and external peripherals
Support for memory mapped peripherals
Support for peripherals running on slower frequency buses
Serial Interface
Two 8-pin UART interfaces provided
Selectable internal or external serial clock to allow wide range of baud rates
Register compatibility with NS16550 register set
Complete status reporting capability
Transmitter and receiver are each buffered with 16-byte FIFOs when in FIFO mode
Fully programmable serial-interface characteristics
Supports DMA using internal DMA engine
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