- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360743 > ICS1572M-101 GT 4C 4#12 PIN RECP WALL RM PDF資料下載
參數(shù)資料
| 型號： | ICS1572M-101 |
| 英文描述： | GT 4C 4#12 PIN RECP WALL RM |
| 中文描述： | 用戶可編程的差分輸出圖形時鐘發(fā)生器 |
| 文件頁數(shù)： | 13/19頁 |
| 文件大?。?/td> | 276K |
| 代理商： | ICS1572M-101 |
Pin Descriptions - ICS1572-101
PIN#
NAME
DESCRIPTION
13
12
8
3
4
2
19
18
17
9
5
16
15
14
6,7
1,10,11,20
CLK+
CLK
LOAD
XTAL1
XTAL2
AD0
AD1
AD2
AD3
LD/N2
STROBE
VDD
VDDO
IPRG
VSS
NC
Clock out (non-inverted)
Clock out (inverted)
Load output. This output is normally at the CLK frequency divided by N1.
Quartz crystal connection 1/external reference frequency input
Quartz crystal connection 2
Address/Data Bit 0 (LSB)
Address/Data Bit 1
Address/Data Bit 2
Address/Data Bit 3 (MSB)
Divided LOAD output. See text.
Control for address/data latch
PLL system power (+5V. See application diagram.)
Output stage power (+5V)
Output stage current set
Device ground. Both pins must be connected to the same ground potential.
Not connected
Pin Descriptions - ICS1572-301
PIN#
NAME
DESCRIPTION
13
12
8
3
4
5
19
18
17
9
2
16
15
14
6,7
1,10,11,20
CLK+
CLK
LOAD
XTAL1
XTAL2
DATCLK
DATA
HOLD~
BLANK
LD/N2
EXTFBK
VDD
VDDO
IPRG
VSS
NC
Clock out (non-inverted)
Clock out (inverted)
Load output. This output is normally at the CLK frequency divided by N1.
Quartz crystal connection 1/external reference frequency input
Quartz crystal connection 2
Data Clock (Input)
Serial Register Data (Input)
HOLD (Input)
Blanking (Input). See Text.
Divided LOAD output/shift clock. See text.
External feedback connection for PLL (input). See text.
PLL system power (+5V. See application diagram.)
Output stage power (+5V)
Output stage current set
Device ground. Both pins must be connected.
Not connected
ICS1572
13
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS1572M-301 | GT 4C 4#12 SKT RECP WALL RM |
| ICS1574B | GT 5C 5#12 PIN RECP WALL RM |
| ICS1574BEB | GT 5C 5#12 SKT RECP WALL RM |
| ICS1574BM | GT 10C 10#16 PIN RECP WALL RM |
| ICS1660 | GT 13C 13#16 PIN RECP WALL RM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS1572M301 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video/Graphics Clock Generator |
| ICS1572M-301 | 制造商:ICS 制造商全稱:ICS 功能描述:User Programmable Differential Output Graphics Clock Generator |
| ICS1574B | 制造商:ICS 制造商全稱:ICS 功能描述:User Programmable Laser Engine Pixel Clock Generator |
| ICS1574BEB | 制造商:ICS 制造商全稱:ICS 功能描述:User Programmable Laser Engine Pixel Clock Generator |
| ICS1574BM | 功能描述:IC CLOCK GEN PROGR LASER 16-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計(jì)時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標(biāo)準(zhǔn)包裝:96 系列:- 類型:時鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。