參數(shù)資料
型號: ICS1893BFILF
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 122/133頁
文件大?。?/td> 0K
描述: PHYCEIVER LOW PWR 3.3V 48-SSOP
標(biāo)準(zhǔn)包裝: 30
系列: PHYceiver™
類型: PHY 收發(fā)器
規(guī)程: MII
電源電壓: 3.14 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 48-BSSOP(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 48-SSOP
包裝: 管件
其它名稱: 1893BFILF
Chapter 7 Management Register Set
ICS1893BF, Rev. F, 5/13/10
May, 2010
89
ICS1893BF Data Sheet Rev. F - Release
Copyright 2009, IDT, Inc.
All rights reserved.
Definitions:
straight transmit = TP_AP & TP_AN
receive = TP_BP & TP_BN
cross
transmit = TP_BP & TP_BN
receive = TP_AP & TP_AN
AMDIX_EN (Pin 10)AMDIX enable pin with 50 kOhm pull-up resistor
AMDIX_EN [19:9] MDIO register 13h bit 9
MDI_MODE [19:8] MDIO register 13h bit 8
7.14.6 Twisted Pair Tri-State Enable, TPTRI (bit 19.7)
The ICS1893BF provides a Twisted Pair Tri-State Enable bit. This bit forces the TP_TXP and TP_TXN
signals to a high-impedance state. When this bit is set to logic:
Zero, the Twisted Pair Interface is operational.
One, the Twisted Pair Interface is tri-stated.
7.14.7 ICS Reserved (bits 19.6:1)
See Section 7.11.2, “ICS Reserved (bits 16.14:11)”, the text for which also applies here.
7.14.8 Automatic 100Base-TX Power-Down (bit 19.0)
The Automatic 100Base-TX Power Down bit provides an STA with the means of enabling the ICS1893BF
to automatically shut down 100Base-TX support functions when 10Base-T operations are being used.
When this bit is set to logic:
Zero, the 100Base-TX Transceiver does not power down automatically in 100Base-TX mode.
One, and the ICS1893BF is operating in 10Base-T mode, the 100Base-TX Transceiver automatically
turns off to reduce the overall power consumption of the ICS1893BF.
Note: There are other means of powering down the 100Base-TX Transceiver (for example, when the
entire device is isolated using bit 0:10).
1
x
straight / cross (auto
selected)
Default Values:
1
0
straight / cross (auto
selected)
Table 7-22. AMDIX_EN (Pin 10) and Control Bits 19. 9:8
AMDIX_EN
(Pin 10)
AMDIX_EN
[Reg 19:9]
MDI_MODE
[Reg 19:8]
Tx/Rx MDI
Configuration
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