參數(shù)資料
型號: ICS87951AYI-147LFT
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 3/14頁
文件大?。?/td> 0K
描述: IC BUFFER ZD 1-9 LOW SKEW 32LQFP
標(biāo)準(zhǔn)包裝: 1,000
系列: HiPerClockS™
類型: 零延遲緩沖器
PLL: 帶旁路
輸入: HCSL,LVCMOS,LVDS,LVHSTL,LVPECL,LVTTL,SSTL
輸出: LVCMOS,LVTTL
電路數(shù): 1
比率 - 輸入:輸出: 2:9
差分 - 輸入:輸出: 是/無
頻率 - 最大: 250MHz
除法器/乘法器: 是/無
電源電壓: 2.375 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-LQFP
供應(yīng)商設(shè)備封裝: 32-TQFP(7x7)
包裝: 帶卷 (TR)
其它名稱: 87951AYI-147LFT
BelaSigna 300
http://onsemi.com
11
Table 10. NONCRITICAL SIGNALS
Pin Name
Description
Routing Guideline
CAP0, CAP1
Internal charge pump capacitor connection
Place 100 nF capacitor close to pins
SDA, SCL
I2C port
Keep as short as possible
GPIO[3..0]
Generalpurpose I/O
Not critical
UART_RX, UART_TX
Generalpurpose UART
Not critical
PCM_FRAME, PCM_CLK, PCM_OUT,
PCM_IN
PCM port
Keep away from analog input lines
LSAD[4..1]
Lowspeed A/D converters
Not critical
SPI_CLK, SPI_CS, SPI_SERI, SPI_SERO
Serial peripheral interface port
Connect to EEPROM
Keep away from analog input lines
Audio Inputs
The audio input traces should be as short as possible. The
input impedance of each audio input pad (e.g., AI0, AI1,
AI2, AI3, AI4) is high (approximately 500 k
W); therefore a
10 nF capacitor is sufficient to decouple the DC bias. This
capacitor and the internal resistance form a firstorder
analog high pass filter whose cutoff frequency can be
calculated by f3dB (Hz) = 1/(R x C x 2π), which results in
~30 Hz for a 10 nF capacitor. This 10 nF capacitor value
applies when the preamplifier is being used, in other words,
when a nonunity gain is applied to the signals. When the
preamplifier is bypassed, the impedance is reduced; hence,
the cutoff frequency of the resulting highpass filter could
be too high. In such a case, the use of a 3040 nF serial
capacitor is recommended. In cases where linelevel analog
inputs without DC bias are used, the capacitor may be
omitted for transparent bass response.
The audio input pad AI3 is not available on the WLCSP
package option.
BelaSigna 300 provides microphone power supply
(VREG) and ground (AGND). Keep audio input traces
strictly away from output traces. A 2.0 V microphone bias
might also be provided by the VDBL power supply.
Digital outputs (RCVR) MUST be kept away from
microphone inputs to avoid crosscoupling.
Audio Outputs
The audio output traces should be as short as possible. The
trace length of RCVR+ and RCVR should be
approximately the same to provide matched impedances.
Recommendation for Unused Pins
The table below shows the recommendation for each pin
when they are not used.
Table 11. RECOMMENDATIONS FOR UNUSED PADS
WLCSP Ball Index
DFN Pin Index
BelaSigna 300 Signal Name
Recommended Connection when Not Used
B2
20
RCVR_HP+
Do not connect
C3
19
RCVR+
Do not connect
A3
18
RCVR
Do not connect
B4
17
RCVR_HP
Do not connect
A11
7
AI4
Connect to AGND
N/A
6
AI3/LOUT3
Connect to AGND
B12
4
AI2/LOUT2
Connect to AGND
A13
3
AI1/LOUT1
Connect to AGND
B14
1
AI0/LOUT0
Connect to AGND
D14
44
GPIO[4]/LSAD[4]
Do not connect
E13
43
GPIO[3]/LSAD[3]
Do not connect
C13
42
GPIO[2]/LSAD[2]
Do not connect
D12
41
GPIO[1]/LSAD[1]/UARTRX
Do not connect
E11
40
GPIO[0]/UARTTX
Do not connect
E9
35
EXT_CLK
Do not connect
E7
32
SPI_CLK
Do not connect
C7
31
SPI_SERI
Do not connect
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