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參數(shù)資料
| 型號(hào)： | ICS9214YGLF-T |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 9214 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | 0.173 INCH, 0.65 MM PITCH, LEAD FREE, MO-153, TSSOP-28 |
| 文件頁數(shù)： | 5/16頁 |
| 文件大?。?/td> | 228K |
| 代理商： | ICS9214YGLF-T |
13
Integrated
Circuit
Systems, Inc.
ICS9214
0809E—11/17/06
Figure 7. Cycle-to-cycle Duty Cycle Error
Figure 6. Short-term Jitter
Figure 5. Cycle-to-cycle Jitter
Power Sequencing
Supply voltages for the ICS9214 must be applied before, or at the same time and external input and output signals.
Figure 8. Input frequency Modulation
tCYCLE,i
tJ = tCYCLE, - tCYCLE, i+1 over 10,000 consecutive cycles
tCYCLE,i+1
ODCLK_T
ODCLK_C
t4CYCLE, i
tJ = t4CYCLE, i - t4CYCLE i+1 over 10,000 consecutive cycles
t4CYCLE, i+1
ODCLK_T
ODCLK_C
Cycle (i)
Cycle (i+1)
tPW+ (i)
tCYCLE (i)
tPW+ (i+1)
tCYCLE (i+1)
tDC,ERR =tPW+(i) - tPW+(i+1) and tPW-(i) - tPW-(i+1)
tPW- (i)
tPW- (i+1)
ODCLK_T
ODCLK_C
fNOM
(1-PM,IN)*fNOM
0.5/fM,IN
1/fM,IN
t
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