參數(shù)資料
型號(hào): ICS9341yF
英文描述: 133MHz Clock Generator and Integrated Buffer for PowerPC⑩
中文描述: 133MHz的時(shí)鐘發(fā)生器和集成緩沖器,用于PowerPC的⑩
文件頁(yè)數(shù): 5/9頁(yè)
文件大?。?/td> 207K
代理商: ICS9341YF
ICS9341
PCI_STOP# Timing Diagram
A5,+ E>64>'> 6 6
3@ >>>8>>8
# $%&"
>68>> @7@/@
!"
!
%
/ $ $ $$*
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CPU_STOP# Timing Diagram
!A5,+ E4>>64>'> !..6
!A5,+ E4>4@4>68>>888
6#> !6(7@44>'>">6
>> !6@,> !674@>7
8>>>8>>
"78 !D
,>@7>>4,>74@>4>>8
E A5,+ E>>8>
相關(guān)PDF資料
PDF描述
ICS9342yF-T 133MHz Clock Generator and Integrated Buffer for PowerPC⑩
ICS9342 133MHz Clock Generator and Integrated Buffer for PowerPC⑩
ICS93701 DDR Phase Lock Loop Clock Driver
ICS93701YGT DDR Phase Lock Loop Clock Driver
ICS93705 DDR Phase Lock Loop Zero Delay Clock Buffer
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ICS9342 制造商:ICS 制造商全稱:ICS 功能描述:133MHz Clock Generator and Integrated Buffer for PowerPC⑩
ICS9342AFLF 制造商:Integrated Device Technology Inc 功能描述:
ICS9342YF-T 制造商:ICS 制造商全稱:ICS 功能描述:133MHz Clock Generator and Integrated Buffer for PowerPC⑩
ICS93701 制造商:ICS 制造商全稱:ICS 功能描述:DDR Phase Lock Loop Clock Driver
ICS93701YGT 制造商:ICS 制造商全稱:ICS 功能描述:DDR Phase Lock Loop Clock Driver