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參數資料
| 型號： | ICSSSTUB32871A |
| 英文描述： | 27-Bit Registered Buffer for DDR2 |
| 中文描述： | 27位注冊緩沖DDR2內存 |
| 文件頁數： | 10/18頁 |
| 文件大?。?/td> | 213K |
| 代理商： | ICSSSTUB32871A |
10
1186G—04/16/07
ICSSSTUB32871A
Absolute Maximum Ratings
Storage Temperature. . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 2.5V
Input Voltage
1,. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
-0.5V to VDD +2.5V
Output Voltage
1,2. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
-0.5V to VDDQ + 0.5V
Input Clamp Current . . . . . . . . . . . . . . . . . . . . ±50 mA
Output Clamp Current. . . . . . . . . . . . . . . . . . . ±50mA
Continuous Output Current. . . . . . . . . . . . . . . ±50mA
VDD or GND Current/Pin . . . . . . . . . . . . . . . . ±100mA
Package Thermal Impedance
3. . . . . . . . . . . . . . .
36°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These
ratings are stress specifications only and functional operation of the device at these or any other conditions above those
listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect product reliability.
Notes:
1. The input and output negative voltage
ratings may be excluded if the input
and output clamp ratings are observed.
2. This value is limited to 2.5V maximum.
3. The package thermal impedance is
calculated in accordance with
JESD 51.
Recommended Operating Conditions
PARAMETER
V
DDQ
V
REF
V
TT
V
I
Input Voltage
V
IH (DC)
DC Input High Voltage
V
IH (AC)
AC Input High Voltage
V
IL (DC)
DC Input Low Voltage
V
IL
(AC)
AC Input Low Voltage
V
IH
Input High Voltage Level
V
IL
Input Low Voltage Level
V
ICR
Common mode Input Range
V
ID
Differential Input Voltage
I
OH
I
OL
T
A
1
Guaranteed by design, not 100% tested in production.
Note: Rst and Cn inputs must be helf at valid logic levels (not floating) to ensure proper device operation. The
differential inputs must not be floating unless Rst is low.
MIN
1.7
TYP
1.8
MAX
1.9
UNITS
0.49 x V
DD
V
REF
- 0.04
0
V
REF
+ 0.125
V
REF
+ 0.250
0.5 x V
DD
V
REF
0.51 x V
DD
V
REF
+ 0.04
V
DDQ
V
REF
- 0.125
V
REF
- 0.250
0.65 x V
DDQ
0.35 x V
DDQ
1.125
0.675
0.600
-8
8
70
0
°C
mA
V
DESCRIPTION
I/O Supply Voltage
Reference Voltage
Termination Voltage
Operating Free-Air Temperature
RESET
CK, CK
Low-Level Output Current
High-Level Output Current
Data Inputs
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| ICSSSTUB32871AzLFT | 27-Bit Registered Buffer for DDR2 |
| ICSSSTUB32871AzT | 27-Bit Registered Buffer for DDR2 |
| ICSSSTUB32872A | 28-Bit Registered Buffer for DDR2 |
| ICSSSTUBF32866A | 25-Bit Configurable Registered Buffer for DDR2 |
| ICSSSTUBF32866Az(LF)T | 25-Bit Configurable Registered Buffer for DDR2 |
相關代理商/技術參數 |
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| ICSSSTUB32871AZLFT | 制造商:ICS 制造商全稱:ICS 功能描述:27-Bit Registered Buffer for DDR2 |
| ICSSSTUB32871AZT | 制造商:ICS 制造商全稱:ICS 功能描述:27-Bit Registered Buffer for DDR2 |
| ICSSSTUB32872A | 制造商:ICS 制造商全稱:ICS 功能描述:28-Bit Registered Buffer for DDR2 |
| ICSSSTUBF32866A | 制造商:ICS 制造商全稱:ICS 功能描述:25-Bit Configurable Registered Buffer for DDR2 |
| ICSSSTUBF32866AZ(LF)T | 制造商:ICS 制造商全稱:ICS 功能描述:25-Bit Configurable Registered Buffer for DDR2 |
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