參數(shù)資料
型號: IDT5T93GL02PGGI8
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘及定時
英文描述: 5T SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
封裝: GREEN, TSSOP-20
文件頁數(shù): 11/14頁
文件大?。?/td> 145K
代理商: IDT5T93GL02PGGI8
INDUSTRIALTEMPERATURERANGE
6
IDT5T93GL02
2.5VLVDS1:2GLITCHLESSCLOCKBUFFERTERABUFFERII
DIFFERENTIAL INPUT AC TEST CONDITIONS FOR LVDS
Symbol
Parameter
Value
Units
VDIF
Input Signal Swing(1)
400
mV
VX
DifferentialInputSignalCrossingPoint(2)
1.2
V
DH
Duty Cycle
50
%
VTHI
InputTimingMeasurementReferenceLevel(3)
CrossingPoint
V
tR, tF
InputSignalEdgeRate(4)
2
V/ns
NOTES:
1. The 400mV peak-to-peak input pulse level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. This device meets the VDIF (AC)
specification under actual use conditions.
2. A 1.2V crossing point level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. This device meets the VX specification under
actual use conditions.
3. In all cases, input waveform timing is marked at the differential cross-point of the input signals.
4. The input signal edge rate of 2V/ns or greater is to be maintained in the 20% to 80% range of the input waveform.
AC DIFFERENTIAL INPUT SPECIFICATIONS(1)
Symbol
Parameter
Min.
Typ.
Max
Unit
VDIF
ACDifferentialVoltage(2)
0.1
3.6
V
VIX
DifferentialInputCrosspointVoltage
0.05
VDD
V
VCM
CommonModeInputVoltageRange(3)
0.05
VDD
V
VIN
InputVoltage
- 0.3
+3.6
V
NOTES:
1. The output will not change state until the inputs have crossed and the minimum differential voltage defined by VDIF has been met or exceeded.
2. VDIF specifies the minimum input voltage (VTR - VCP) required for switching where VTR is the "true" input level and VCP is the "complement" input level. The AC differential voltage
must be achieved to guarantee switching to a new state.
3. VCM specifies the maximum allowable range of (VTR + VCP) /2.
POWER SUPPLY CHARACTERISTICS FOR LVDS OUTPUTS(1)
Symbol
Parameter
Test Conditions
Typ.
Max
Unit
IDDQ
Quiescent VDD Power Supply Current
VDD = Max., All Input Clocks = LOW(2)
240
mA
Outputsenabled
ITOT
Total Power VDD Supply Current
VDD = 2.7V., FREFERENCE CLOCK = 450MHz
250
mA
IPD
Total Power Down Supply Current
PD = LOW
5
mA
NOTES:
1. These power consumption characteristics are for all the valid input interfaces and cover the worst case conditions.
2. The true input is held LOW and the complementary input is held HIGH.
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