參數(shù)資料
型號: IDT70V26S55JI
廠商: Integrated Device Technology, Inc.
英文描述: HIGH-SPEED 3.3V 16K x 16 DUAL-PORT STATIC RAM
中文描述: 高速3.3 16K的× 16 DUAL-PORT靜態(tài)RAM
文件頁數(shù): 8/17頁
文件大?。?/td> 144K
代理商: IDT70V26S55JI
6.42
IDT70V26S/L
High-Speed 16K x 16 Dual-Port Static RAM Industrial and Commercial Temperature Ranges
-;*+3
7!
NOTES:
1. Timng depends on which signal is asserted last,
OE
,
CE
,
LB
, or
UB
.
2. Timng depends on which signal is de-asserted first
CE
,
OE
,
LB
, or
UB
.
3. t
BDD
delay is required only in cases where the opposite port is completing a write operation to the same address location. For simultaneous read operations
BUSY
has no
relation to valid output data.
4. Start of valid data depends on which timng becomes effective last t
AOE
, t
ACE
, t
AA
or t
BDD
.
5.
SEM
= V
IH
.
NOTES:
1. Transition is measured 0mV fromLow- or High-impedance voltage with Output Test Load (Figure 2).
2.
This parameter is guaranteed by device characterization, but is not production tested.
3.
To access RAM
CE
= V
IL
and
SEM
= V
IH
. To access semaphore,
CE
= V
IH
and
SEM
= V
IL
. Either condition must be valid for the entire t
EW
time.
4.
The specification for t
DH
must be met by the device supplying write data to the RAMunder all operating conditions. Although t
DH
and t
OW
values will vary over voltage and
temperature, the actual t
DH
will always be smaller than the actual t
OW
.
5.
'X' in part numbers indicates power rating (S or L).
6.
Industrial temperature: for specific speeds, packages and powers contact your sales office.
/%2;%
2$+)34
7=!
t
RC
R/
W
CE
ADDR
t
AA
t
ACE
(4)
OE
UB
,
LB
2945 drw 07
(4)
t
AOE
(4)
t
ABE
(4)
(1)
t
LZ
t
OH
(2)
t
HZ
(3,4)
t
BDD
DATA
OUT
BUSY
OUT
VALID DATA
(4)
Symbol
Parameter
70V26X25
Com'l Only
70V26X35
Com'l Only
70V26X55
Com'l Only
Unit
Mn.
Max.
Mn.
Max.
Mn.
Max.
WRITE CYCLE
t
WC
Write Cycle Time
25
____
35
____
55
____
ns
t
EW
Chip Enable to End-of-Write
(3)
20
____
30
____
45
____
ns
t
AW
Address Valid to End-of-Write
20
____
30
____
45
____
ns
t
AS
Address Set-up Time
(3)
0
____
0
____
0
____
ns
t
WP
Write Pulse Width
20
____
25
____
40
____
ns
t
WR
Write Recovery Time
0
____
0
____
0
____
ns
t
DW
Data Valid to End-of-Write
15
____
20
____
30
____
ns
t
HZ
Output High-Z Time
(1,2)
____
15
____
20
____
25
ns
t
DH
Data Hold Time
(4)
0
____
0
____
0
____
ns
t
WZ
Write Enable to Output in High-Z
(1,2)
____
15
____
20
____
25
ns
t
OW
Output Active from End-of-Write
(1,2,4)
0
____
0
____
0
____
ns
t
SWRD
SEM
Flag Write to Read Time
5
____
5
____
5
____
ns
t
SPS
SEM
Flag Contention Window
5
____
5
____
5
____
ns
2945 tbl 12
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