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參數(shù)資料
| 型號(hào)： | IDT71V25761S166BQI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | 128K X 36, 256K X 18 3.3V Synchronous SRAMs 2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect |
| 中文描述： | 128K X 36 CACHE SRAM, 3.5 ns, PBGA165 |
| 封裝： | FBGA-165 |
| 文件頁數(shù)： | 11/23頁 |
| 文件大?。?/td> | 526K |
| 代理商： | IDT71V25761S166BQI |
6.42
IDT71V25761, IDT71V25781, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with
2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect Commercial and Industrial Temperature Ranges
Sequence 1
Sequence 2
Sequence 3
Sequence 4
A1
A0
A1
A0
A1
A0
A1
A0
First Address
0
0
0
1
1
0
1
1
Second Address
0
1
0
0
1
1
1
0
Third Address
1
0
1
1
0
0
0
1
Fourth Address
(1)
1
1
1
0
0
1
0
0
5297 tbl 14
Linear Burst Sequence Table (
LBO
=V
SS
)
Synchronous Write Function Truth Table
(1, 2)
Asynchronous Truth Table
(1)
Interleaved Burst Sequence Table (
LBO
=V
DD
)
NOTES:
1. L = V
IL
, H = V
IH
, X = Dont Care.
2.
BW
3
and
BW
4
are not applicable for the IDT71V2578.
3. Multiple bytes may be selected during the same cycle.
NOTES:
1. L = V
IL
, H = V
IH
, X = Dont Care.
2. Synchronous function pins must be biased appropriately to satisfy operation requirements.
NOTE:
1. Upon completion of the Burst sequence the counter wraps around to its initial state.
NOTE:
1. Upon completion of the Burst sequence the counter wraps around to its initial state.
Operation
GW
BWE
BW
1
BW
2
BW
3
BW
4
Read
H
H
X
X
X
X
Read
H
L
H
H
H
H
Write all Bytes
L
X
X
X
X
X
Write all Bytes
H
L
L
L
L
L
Write Byte 1
(3)
H
L
L
H
H
H
Write Byte 2
(3)
H
L
H
L
H
H
Write Byte 3
(3)
H
L
H
H
L
H
Write Byte 4
(3)
H
L
H
H
H
L
5297 tbl 12
Sequence 1
Sequence 2
Sequence 3
Sequence 4
A1
A0
A1
A0
A1
A0
A1
A0
First Address
0
0
0
1
1
0
1
1
Second Address
0
1
1
0
1
1
0
0
Third Address
1
0
1
1
0
0
0
1
Fourth Address
(1)
1
1
0
0
0
1
1
0
5297 tbl 15
Operation
(2)
OE
ZZ
I/O Status
Power
Read
L
L
Data Out
Active
Read
H
L
High-Z
Active
Write
X
L
High-Z – Data In
Active
Deselected
X
L
High-Z
Standby
Sleep Mode
X
H
High-Z
Sleep
5297 tbl 13
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT71V25761S166PF | 128K X 36, 256K X 18 3.3V Synchronous SRAMs 2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect |
| IDT71V25761S166PFI | 128K X 36, 256K X 18 3.3V Synchronous SRAMs 2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect |
| IDT71V25761S183BG | 128K X 36, 256K X 18 3.3V Synchronous SRAMs 2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect |
| IDT71V25761S183BGI | 128K X 36, 256K X 18 3.3V Synchronous SRAMs 2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect |
| IDT71V25761S183BQ | 128K X 36, 256K X 18 3.3V Synchronous SRAMs 2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT71V25761S166PF | 功能描述:IC SRAM 4MBIT 166MHZ 100TQFP RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 產(chǎn)品變化通告:Product Discontinuation 05/Nov/2008 標(biāo)準(zhǔn)包裝:84 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 同步 ZBT 存儲(chǔ)容量:4.5M（128K x 36） 速度:75ns 接口:并聯(lián) 電源電壓:3.135 V ~ 3.465 V 工作溫度:-40°C ~ 85°C 封裝/外殼:119-BGA 供應(yīng)商設(shè)備封裝:119-PBGA（14x22） 包裝:托盤 其它名稱:71V3557SA75BGI |
| IDT71V25761S166PF8 | 功能描述:IC SRAM 4MBIT 166MHZ 100TQFP RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 產(chǎn)品變化通告:Product Discontinuation 05/Nov/2008 標(biāo)準(zhǔn)包裝:84 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 同步 ZBT 存儲(chǔ)容量:4.5M（128K x 36） 速度:75ns 接口:并聯(lián) 電源電壓:3.135 V ~ 3.465 V 工作溫度:-40°C ~ 85°C 封裝/外殼:119-BGA 供應(yīng)商設(shè)備封裝:119-PBGA（14x22） 包裝:托盤 其它名稱:71V3557SA75BGI |
| IDT71V25761S166PFG | 功能描述:IC SRAM 4MBIT 166MHZ 100TQFP RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:72 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 同步 存儲(chǔ)容量:4.5M（256K x 18） 速度:133MHz 接口:并聯(lián) 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 封裝/外殼:100-LQFP 供應(yīng)商設(shè)備封裝:100-TQFP（14x20） 包裝:托盤 |
| IDT71V25761S166PFG8 | 制造商:Integrated Device Technology Inc 功能描述:IC SRAM 4.5MBIT 166MHZ 100TQFP |
| IDT71V25761S166PFGI | 制造商:Integrated Device Technology Inc 功能描述:IC SRAM 4.5MBIT 166MHZ 100TQFP |
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