參數(shù)資料
型號(hào): IDT72261LA15TFI8
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 12/27頁(yè)
文件大?。?/td> 0K
描述: IC FIFO 8192X18 LP 15NS 64QFP
標(biāo)準(zhǔn)包裝: 1,250
系列: 7200
功能: 同步
存儲(chǔ)容量: 144K(8K x 18)
數(shù)據(jù)速率: 67MHz
訪問(wèn)時(shí)間: 15ns
電源電壓: 4.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應(yīng)商設(shè)備封裝: 64-TQFP(10x10)
包裝: 帶卷 (TR)
其它名稱: 72261LA15TFI8
2
COMMERCIALANDINDUSTRIAL
TEMPERATURERANGES
IDT72261LA/72271LA SuperSync FIFO
16,384 x 9 and 32,768 x 9
PIN CONFIGURATIONS
TQFP (PN64-1, ORDER CODE: PF)
STQFP (PP64-1, ORDER CODE: TF)
TOP VIEW
DESCRIPTION (CONTINUED)
PIN 1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
WEN
SEN
DC(1)
VCC
GND(2)
D8
D7
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
DNC(3)
GND
DNC(3)
VCC
DNC(3)
GND
DNC(3)
Q8
Q7
Q6
GND
WCLK
PRS
MRS
LD
FWFT/SI
GND
FF
/IR
PAF
HF
V
CC
PAE
EF
/OR
RCLK
REN
RT
OE
Q5
Q4
V
CC
Q3
Q2
GND
Q1
Q0
GND
D0
D1
D2
D3
D4
D5
D6
4671 drw 02
NOTES:
1. DC = Don’t Care. Must be tied to GND or VCC, cannot be left open.
2. This pin may either be tied to ground or left open.
3. DNC = Do Not Connect.
SuperSyncFIFOsareparticularlyappropriatefornetwork,video,telecom-
munications,datacommunicationsandotherapplicationsthatneedtobuffer
largeamountsofdata.
TheinputportiscontrolledbyaWriteClock(WCLK)inputandaWriteEnable
(WEN)input. DataiswrittenintotheFIFOoneveryrisingedgeofWCLKwhen
WEN isasserted.TheoutputportiscontrolledbyaReadClock(RCLK)input
and Read Enable (REN) input. Data is read from the FIFO on every rising
edgeofRCLKwhenRENisasserted. AnOutputEnable(OE)inputisprovided
forthree-statecontroloftheoutputs.
The frequencies of both the RCLK and the WCLK signals may vary from 0
to fMAX with complete independence. There are no restrictions on the
frequency of one clock input with respect to the other.
There are two possible timing modes of operation with these devices:
IDT Standard mode and First Word Fall Through (FWFT) mode.
In IDT Standard mode, the first word written to an empty FIFO will not
appear on the data output lines unless a specific read operation is
performed. Areadoperation,whichconsistsof activatingREN and enabling
arisingRCLKedge,willshiftthewordfrominternalmemorytothedataoutput
lines.
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