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| 型號： | IDT72V51443L7-5BB8 |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 18/50頁 |
| 文件大小： | 0K |
| 描述： | IC FLOW CTRL MULTI QUEUE 256-BGA |
| 標準包裝： | 1,000 |
| 類型： | 多隊列流量控制 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 256-BBGA |
| 供應商設(shè)備封裝： | 256-BGA（17x17） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 72V51443L7-5BB8 |
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IDT72V51433/72V51443/72V51453 3.3V, MULTI-QUEUE FLOW-CONTROL DEVICES
(16 QUEUES) 18 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
queues were setup, so when sector 2 is selected the unused outputs
PAE[2:7]
will be don't care states.
Note, that if a read or write operation is occurring to a specific queue, say
queue ‘x’ on the same cycle as a sector switch which will include the queue ‘x’,
then there may be an extra RCLK cycle delay before that queues status is
correctly shown on the respective output of the
PAEn bus.
Sectorscanbeselectedonconsecutiveclockcycles,thatisthesectoronthe
PAEnbuscanchangeeveryRCLKcycle.Also,datacanbereadoutofaqueue
onthesameRCLKrisingedgethatasectorisbeingselected,theonlyrestriction
being that a read queue selection and
PAEnsectorselectioncannotbemade
on the same RCLK cycle.
If 8 or less queues are setup then queues, Queue[0:7] have their
PAEstatus
output on
PAE[0:7]constantly.
Whenthemulti-queuedevicesareconnectedinexpansionofmorethanone
devicethe
PAEnbussesofalldevicesareconnectedtogether,whenswitching
between sectors of different devices the user must utilize the 3 most significant
bits of the RDADD address bus (as well as the 2 LSB’s). These 3 MSB’s
correspond to the device ID inputs, which are the static inputs, ID0, ID1 & ID2.
Please refer to Figure 22,
PAEn - Direct Mode Sector Selection for timing
information. Also refer to Table 2, Read Address Bus, RDADD.
PAEn – POLLED BUS
If FM is HIGH at master reset then the
PAEnbusoperatesinPolled(looped)
mode.Inpolledmodethe
PAEnbusautomaticallycyclesthroughthe2sectors
within the device regardless of how many queues have been setup in the part.
EveryrisingedgeoftheRCLKcausesthenextsectortobeloadedonthe
PAEn
bus. The device configured as the master (MAST input tied HIGH), will take
control of the
PAEn after MRS goes LOW. For the whole RCLK cycle that the
first sector is on
PAEntheESYNC(PAEnbussync)outputwillbeHIGH,forthe
2nd sector, this ESYNC output will be LOW. This ESYNC output provides the
user with a mark with which they can synchronize to the
PAEnbus,ESYNCis
always HIGH for the RCLK cycle that the first sector of a device is present on
the
PAEn bus.
When devices are connected in expansion mode, only one device will be
set as the Master, MAST input tied HIGH, all other devices will have MAST tied
LOW. The master device is the first device to take control of the
PAEnbusand
willplaceitsfirstsectoronthebusontherisingedgeofRCLKafterthe
MRSinput
goes LOW. For the next 3 RCLK cycles the master device will maintain control
ofthe
PAEnbusandcycleitssectorsthroughit,allotherdevicesholdtheirPAEn
outputs in High-Impedance. When the master device has cycled its sectors it
passes a token to the next device in the chain and that device assumes control
of the
PAEn bus and then cycles its sectors and so on, the PAEn bus control
token being passed on from device to device. This token passing is done via
theEXOoutputsandEXIinputsofthedevices(“
PAEExpansionOut”and“PAE
ExpansionIn”).TheEXOoutputofthemasterdeviceconnectstotheEXIofthe
second device in the chain and the EXO of the second connects to the EXI of
the third and so on. The final device in a chain has its EXO connected to the EXI
of the first device, so that once the
PAEnbushascycledthroughallsectorsof
all devices, control of the
PAEnwillpasstothemasterdeviceagainandsoon.
The ESYNC of each respective device will operate independently and simply
indicatewhenthatrespectivedevicehastakencontrolofthebusandisplacing
its first sector on to the
PAEn bus.
When operating in single device mode the EXI input must be connected to
theEXOoutputofthesamedevice.Insingledevicemodeatokenisstillrequired
to be passed into the device for accessing the
PAEn bus.
Please refer to Figure 27,
PAEn Bus – Polled Modefor timing information.
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| IDT72V51443L7-5BBI | 功能描述:IC FLOW CTRL MULTI QUEUE 256-BGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:調(diào)幀器 應用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT72V51446L6BB | 功能描述:IC FLOW CTRL MULTI QUEUE 256-BGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:調(diào)幀器 應用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT72V51446L6BB8 | 功能描述:IC FLOW CTRL MULTI QUEUE 256-BGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:調(diào)幀器 應用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT72V51446L7-5BB | 功能描述:IC FLOW CTRL MULTI QUEUE 256-BGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:調(diào)幀器 應用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
| IDT72V51446L7-5BB8 | 功能描述:IC FLOW CTRL MULTI QUEUE 256-BGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:調(diào)幀器 應用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝 |
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