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參數(shù)資料
| 型號(hào)： | IDT82P2521BHG |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁(yè)數(shù)： | 15/147頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU E1 21+1CH SHORT 640-PBGA |
| 標(biāo)準(zhǔn)包裝： | 5 |
| 類型： | 線路接口裝置（LIU） |
| 規(guī)程： | E1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 640-BGA 裸露焊盤(pán) |
| 供應(yīng)商設(shè)備封裝： | 640-PBGA-EP（31x31） |
| 包裝： | 托盤(pán) |
| 其它名稱： | 82P2521BHG |
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IDT82P2521
21(+1) CHANNEL HIGH-DENSITY E1 LINE INTERFACE UNIT
Programming Information
111
December 7, 2005
INTS0 - Interrupt Status Register 0
Address: 020H, 060H, 0A0H, 0E0H, 120H, 160H, 1A0H, 1E0H, (CH1~CH8)
220H, 260H, 2A0H, 2E0H, 320H, 360H, 3A0H, 3E0H, (CH9~CH16)
420H, 460H, 4A0H, 4E0H, 520H, (CH17~CH21)
7E0H (CH0)
Type: Read / Write
Default Value: 00H
Bit
Name
Description
7
DAC_IS
This bit indicates the interrupt status of the waveform amplitude overflow.
0: No waveform amplitude overflow interrupt is generated; or a ‘1’ is written to this bit. (default)
1: Waveform amplitude overflow interrupt is generated and is reported by the INT pin.
6
TJA_IS
This bit indicates the interrupt status of the TJA FIFO overflow or underflow.
0: No TJA FIFO overflow or underflow interrupt is generated; or a ‘1’ is written to this bit. (default)
1: TJA FIFO overflow or underflow interrupt is generated and is reported by the INT pin.
5
RJA_IS
This bit indicates the interrupt status of the RJA FIFO overflow or underflow.
0: No RJA FIFO overflow or underflow interrupt is generated; or a ‘1’ is written to this bit. (default)
1: RJA FIFO overflow or underflow interrupt is generated and is reported by the INT pin.
4
TOC_IS
This bit indicates the interrupt status of the Line Driver TOC.
0: No TOC interrupt is generated; or a ‘1’ is written to this bit. (default)
1: TOC interrupt is generated and is reported by the INT pin. When the TOC_IES bit (b4, INTES,...) is ‘0’, a transition from ‘0’ to
‘1’ on the TOC_S bit (b4, STAT0,...) set this bit to ‘1’; when the TOC_IES bit (b4, INTES,...) is ‘1’, any transition (from ‘0’ to ‘1’ or
from ‘1’ to ‘0’) on the TOC_S bit (b4, STAT0,...) set this bit to ‘1’.
3
TCKLOS_IS
This bit indicates the interrupt status of the TCLKn missing.
0: No TCLKn missing interrupt is generated; or a ‘1’ is written to this bit. (default)
1: TCLKn missing interrupt is generated and is reported by the INT pin. When the TCKLOS_IES bit (b3, INTES,...) is ‘0’, a transi-
tion from ‘0’ to ‘1’ on the TCKLOS_S bit (b3, STAT0,...) set this bit to ‘1’; when the TCKLOS_IES bit (b3, INTES,...) is ‘1’, any tran-
sition (from ‘0’ to ‘1’ or from ‘1’ to ‘0’) on the TCKLOS_S bit (b3, STAT0,...) set this bit to ‘1’.
2
TLOS_IS
This bit indicates the interrupt status of TLOS.
0: No TLOS interrupt is generated; or a ‘1’ is written to this bit. (default)
1: TLOS interrupt is generated and is reported by the INT pin. When the TLOS_IES bit (b2, INTES,...) is ‘0’, a transition from ‘0’
to ‘1’ on the TLOS_S bit (b2, STAT0,...) set this bit to ‘1’; when the TLOS_IES bit (b2, INTES,...) is ‘1’, any transition (from ‘0’ to
‘1’ or from ‘1’ to ‘0’) on the TLOS_S bit (b2, STAT0,...) set this bit to ‘1’.
1
SLOS_IS
This bit indicates the interrupt status of the SLOS.
0: No SLOS interrupt is generated; or a ‘1’ is written to this bit. (default)
1: SLOS interrupt is generated and is reported by the INT pin. When the LOS_IES bit (b1, INTES,...) is ‘0’, a transition from ‘0’ to
‘1’ on the SLOS_S bit (b1, STAT0,...) set this bit to ‘1’; when the LOS_IES bit (b1, INTES,...) is ‘1’, any transition (from ‘0’ to ‘1’ or
from ‘1’ to ‘0’) on the SLOS_S bit (b1, STAT0,...) set this bit to ‘1’.
0
LLOS_IS
This bit indicates the interrupt status of the LLOS.
0: No LLOS interrupt is generated; or a ‘1’ is written to this bit. (default)
1: LLOS interrupt is generated and is reported by the INT pin. When the LOS_IES bit (b1, INTES,...) is ‘0’, a transition from ‘0’ to
‘1’ on the LLOS_S bit (b0, STAT0,...) set this bit to ‘1’; when the LOS_IES bit (b1, INTES,...) is ‘1’, any transition (from ‘0’ to ‘1’ or
from ‘1’ to ‘0’) on the LLOS_S bit (b0, STAT0,...) set this bit to ‘1’.
7
654
321
0
DAC_IS
TJA_IS
RJA_IS
TOC_IS
TCKLOS_IS
TLOS_IS
SLOS_IS
LLOS_IS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT82P2816BBG | IC LINE INTERFACE UNIT 416-PBGA |
| IDT82P2821BH | IC LIU T1/J1/E1 21+1CH 640-PBGA |
| IDT82P2828BHG | IC LIU T1/J1/E1 28+1CH 640-PBGA |
| IDT82P2916BFG | IC LIU T1/E1/J1 16CH SH 484BGA |
| IDT82P5088BBG | IC LIU T1/E1/J1 OCTAL 256PBGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT82P2521BHGBLANK | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:21(1) Channel High-Density E1 Line Interface Unit |
| IDT82P2808 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:8(+1) Channel High-Density T1/E1/J1 Line Interface Unit |
| IDT82P2808BB | 功能描述:IC LIU T1/J1/E1 8+1CH 416-PBGA RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| IDT82P2808BBG | 功能描述:IC LIU T1/J1/E1 8+1CH 416-PBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| IDT82P2816 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:16(+1) Channel High-Density T1/E1/J1 Line Interface Unit |
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