- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1924 > IDT82P2521BHG (IDT, Integrated Device Technology Inc)IC LIU E1 21+1CH SHORT 640-PBGA PDF資料下載
參數(shù)資料
| 型號： | IDT82P2521BHG |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 8/147頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU E1 21+1CH SHORT 640-PBGA |
| 標(biāo)準(zhǔn)包裝： | 5 |
| 類型： | 線路接口裝置（LIU） |
| 規(guī)程： | E1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 640-BGA 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 640-PBGA-EP（31x31） |
| 包裝： | 托盤 |
| 其它名稱： | 82P2521BHG |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁當(dāng)前第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁
IDT82P2521
21(+1) CHANNEL HIGH-DENSITY E1 LINE INTERFACE UNIT
Programming Information
105
December 7, 2005
INTES - Interrupt Trigger Edges Select Register
Address: 01AH, 05AH, 09AH, 0DAH, 11AH, 15AH, 19AH, 1DAH, (CH1~CH8)
21AH, 25AH, 29AH, 2DAH, 31AH, 35AH, 39AH, 3DAH, (CH9~CH16)
41AH, 45AH, 49AH, 4DAH, 51AH, (CH17~CH21)
7DAH (CH0)
Type: Read / Write
Default Value: 00H
Bit
Name
Description
7-
Reserved.
6
AIS_IES
This bit selects the transition edge of the LAIS_S bit (b6, STAT1,...) and the SAIS_S bit (b7, STAT1,...).
0: A transition from ‘0’ to ‘1’ on the LAIS_S bit (b6, STAT1,...) / the SAIS_S bit (b7, STAT1,...) will set the LAIS_IS bit (b6,
1: Any transition from ‘0’ to ‘1’ or from ‘1’ to ‘0’ on the LAIS_S bit (b6, STAT1,...) / the SAIS_S bit (b7, STAT1,...) will set the
LAIS_IS bit (b6, INTS1,...) / the SAIS_IS bit (b7, INTS1,...) to ‘1’ respectively.
5
PA_IES
This bit selects the transition edge of the PA_S bit (b5, STAT1,...).
0: A transition from ‘0’ to ‘1’ on the PA_S bit (b5, STAT1,...) will set the PA_IS bit (b5, INTS1,...) to ‘1’. (default)
1: Any transition from ‘0’ to ‘1’ or from ‘1’ to ‘0’ on the PA_S bit (b5, STAT1,...) will set the PA_IS bit (b5, INTS1,...) to ‘1’.
4
TOC_IES
This bit selects the transition edge of the TOC_S bit (b4, STAT0,...).
0: A transition from ‘0’ to ‘1’ on the TOC_S bit (b4, STAT0,...) will set the TOC_IS bit (b4, INTS0,...) to ‘1’. (default)
1: Any transition from ‘0’ to ‘1’ or from ‘1’ to ‘0’ on the TOC_S bit (b4, STAT0,...) will set the TOC_IS bit (b4, INTS0,...) to ‘1’.
3
TCKLOS_IES This bit selects the transition edge of the TCKLOS_S bit (b3, STAT0,...).
0: A transition from ‘0’ to ‘1’ on the TCKLOS_S bit (b3, STAT0,...) will set the TCKLOS_IS bit (b3, INTS0,...) to ‘1’. (default)
1: Any transition from ‘0’ to ‘1’ or from ‘1’ to ‘0’ on the TCKLOS_S bit (b3, STAT0,...) will set the TCKLOS_IS bit (b3, INTS0,...) to
‘1’.
2
TLOS_IES
This bit selects the transition edge of the TLOS_S bit (b2, STAT0,...).
0: A transition from ‘0’ to ‘1’ on the TLOS_S bit (b2, STAT0,...) will set the TLOS_IS bit (b2, INTS0,...) to ‘1’. (default)
1: Any transition from ‘0’ to ‘1’ or from ‘1’ to ‘0’ on the TLOS_S bit (b2, STAT0,...) will set the TLOS_IS bit (b2, INTS0,...) to ‘1’.
1
LOS_IES
This bit selects the transition edge of the LLOS_S bit (b0, STAT0,...) and the SLOS_S bit (b1, STAT0,...).
0: A transition from ‘0’ to ‘1’ on the LLOS_S bit (b0, STAT0,...) / the SLOS_S bit (b1, STAT0,...) will set the LLOS_IS bit (b0,
1: Any transition from ‘0’ to ‘1’ or from ‘1’ to ‘0’ on the LLOS_S bit (b0, STAT0,...) / the SLOS_S bit (b1, STAT0,...) will set the
LLOS_IS bit (b0, INTS0,...) / the SLOS_IS bit (b1, INTS0,...) to ‘1’ respectively.
0
IB_IES
This bit selects the transition edge of the IBA_S bit (b1, STAT1,...) and the IBD_S bit (b0, STAT1,...).
0: A transition from ‘0’ to ‘1’ on the IBA_S bit (b1, STAT1,...) / the IBD_S bit (b0, STAT1,...) will set the IBA_IS bit (b1, INTS1,...) /
the IBD_IS bit (b0, INTS1,...) to ‘1’ respectively. (default)
1: Any transition from ‘0’ to ‘1’ or from ‘1’ to ‘0’ on the IBA_S bit (b1, STAT1,...) / the IBD_S bit (b0, STAT1,...) will set the IBA_IS
7654321
0
-
AIS_IES
PA_IES
TOC_IES
TCKLOS_IES
TLOS_IES
LOS_IES
IB_IES
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT82P2816BBG | IC LINE INTERFACE UNIT 416-PBGA |
| IDT82P2821BH | IC LIU T1/J1/E1 21+1CH 640-PBGA |
| IDT82P2828BHG | IC LIU T1/J1/E1 28+1CH 640-PBGA |
| IDT82P2916BFG | IC LIU T1/E1/J1 16CH SH 484BGA |
| IDT82P5088BBG | IC LIU T1/E1/J1 OCTAL 256PBGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT82P2521BHGBLANK | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:21(1) Channel High-Density E1 Line Interface Unit |
| IDT82P2808 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:8(+1) Channel High-Density T1/E1/J1 Line Interface Unit |
| IDT82P2808BB | 功能描述:IC LIU T1/J1/E1 8+1CH 416-PBGA RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| IDT82P2808BBG | 功能描述:IC LIU T1/J1/E1 8+1CH 416-PBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| IDT82P2816 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:16(+1) Channel High-Density T1/E1/J1 Line Interface Unit |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。