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IDT82P2281
SINGLE T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
Pin Description
7
October 7, 2003
CS
Input
38
CS
: Chip Select (Active Low)
This pin must be asserted low to enable the microprocessor interface. The signal must be asserted high at least once
after power up to clear the internal test modes. A transition from high to low must occur on this pin for each Read/Write
operation and can not return to high until the operation is completed.
CS
is a Schmitt-trigger input.
A[0]
A[1]
A[2]
A[3]
A[4]
A[5]
A[6]
A[7]
Input
41
42
43
44
45
46
49
51
A[7:0]: Address Bus
In parallel mode, the signals on these pins select the register for the microprocessor to access.
In SPI mode, these pins should be connected to the ground.
A[7:0] are Schmitt-trigger inputs with pull-down resistor.
D[0] / SDO
D[1]
D[2]
D[3]
D[4]
D[5]
D[6]
D[7]
Output / Input
24
25
26
27
28
29
31
33
D[7:0]: Bi-directional Data Bus
In parallel mode, the signals on these pins are the data for Read / Write operation.
In SPI mode, the D[7:1] pins should be connected to the ground through a 10 K resistor.
D[7:0] are Schmitt-trigger inputs/outputs.
SDO: Serial Data Output
In SPI mode, the data is serially output on this pin.
MPM
Input
22
MPM: Micro Controller Mode
In parallel mode, set this pin low for Motorola mode or high for Intel mode.
In SPI mode, set this pin to a fixed level (high or low). This pin is useless in SPI mode.
MPM is a Schmitt-trigger input.
R
W
/
WR
/ SDI
Input
37
R
W
: Read / Write Select
In parallel Motorola mode, this pin is active high for read operation and active low for write operation.
WR
: Write Strobe (Active Low)
In parallel Intel mode, this pin is active low for write operation.
SDI: Serial Data Input
In SPI mode, the address/control and/or data are serially input on this pin.
R
W
/
WR
/ SDI is a Schmitt-trigger input.
DS
/
RD
/ SCLK
Input
36
DS
: Data Strobe (Active Low)
In parallel Motorola mode, this pin is active low.
RD
: Read Strobe (Active Low)
In parallel Intel mode, this pin is active low for read operation.
SCLK: Serial Clock
In SPI mode, this pin inputs the timing for the SDO and SDI pins. The signal on the SDO pin is updated on the falling
edge of SCLK, while the signal on the SDI pin is sampled on the rising edge of SCLK.
DS
/
RD
/ SCLK is a Schmitt-trigger input.
SPIEN
Input
23
SPIEN: Serial Microprocessor Interface Enable
When this pin is low, the microprocessor interface is in parallel mode.
When this pin is high, the microprocessor interface is in SPI mode.
SPIEN is a Schmitt-trigger input.
JTAG (per IEEE 1149.1)
Name
Type
Pin No.
Description