e-LBCF: Inband Loopback Configuration Register" />
參數(shù)資料
型號: IDT82V2048DAG
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 32/62頁
文件大?。?/td> 0K
描述: IC LIU T1/E1 8CH SHORT 144-TQFP
標(biāo)準(zhǔn)包裝: 30
類型: 線路接口裝置(LIU)
規(guī)程: E1
電源電壓: 3.13 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-TQFP(20x20)
包裝: 托盤
其它名稱: 82V2048DAG
38
IDT82V2048 OCTAL T1/E1 SHORT HAUL LINE INTERFACE UNIT
INDUSTRIAL TEMPERATURE RANGES
e-LBCF: Inband Loopback Configuration Register (1)(R/W, Expanded Address = 08H)
1. This register is global control.
Symbol
Position
Default
Description
-LBCF.7-6
00
0 = Normal Operation. (Default)
1 = Reserved.
LBDE
LBCF.5
0
Loopback Detector Enable
0 = Inband loopback code detection is disabled. (Default)
1 = Inband loopback code detection is enabled.
ALBE
LBCF.4
0
Automatic Loopback Enable
0 = Automatic Inband Loopback disabled.
1 = Automatic Inband Loopback enabled.
LBAL[1:0]
LBCF.3-2
00
Loopback Activate Code Length
00 = 5-bit long activate code in LBAC[7:3] is effective.
01 = 6-bit long activate code in LBAC[7:2] is effective.
10 = 7-bit long activate code in LBAC[7:1] is effective.
11 = 8-bit long activate code in LBAC[7:0] is effective.
LBDL[1:0]
LBCF.1-0
00
Loopback Deactivate Code Length
00 = 5-bit long deactivate code in LBDC[7:3] is effective.
01 = 6-bit long deactivate code in LBDC[7:2] is effective.
10 = 7-bit long deactivate code in LBDC[7:1] is effective.
11 = 8-bit long deactivate code in LBDC[7:0] is effective.
e-LBAC: Inband Loopback Activation Code Register(1)(2)(R/W, Expanded Address = 09H)
1. When setting a value in e-LBAC or e-LBDC that is less than 8 bits, the most significant bits must be replicated in the unused least significant bits. e.g. if setting a 5-bit code = 11000,
the register value should be 11000110. Here b7 is repeated in b2; b6 is repeated in b1; b5 is repeated in b0.
2. This register is global control.
Symbol
Position
Default
Description
LBAC[7:0]
LBAC.7-0
00H
LBAC[7:0] = 8-bit (or 4-bit) repeating activate code is programmed with the length limitation in LBAL[1:0].
LBAC[7:1] = 7-bit repeating activate code is programmed with the length limitation in LBAL[1:0].
LBAC[7:2] = 6-bit (or 3-bit) repeating activate code is programmed with the length limitation in LBAL[1:0].
LBAC[7:3] = 5-bit repeating activate code is programmed with the length limitation in LBAL[1:0].
e-LBDC: Inband Loopback Deactivation Code Register(1)(2)(R/W, Expanded Address = 0AH)
1. When setting a value in e-LBAC or e-LBDC that is less than 8 bits, the most significant bits must be replicated in the unused least significant bits. e.g. if setting a 5-bit code = 11000, the
register value should be 11000110. Here b7 is repeated in b2; b6 is repeated in b1; b5 is repeated in b0.
2. This register is global control.
Symbol
Position
Default
Description
LBDC[7:0]
LBDC.7-0
00H
LBDC[7:0] = 8-bit (or 4-bit) repeating deactivate code is programmed with the length limitation set by LBDL[1:0] bits.
LBDC[7:1] = 7-bit repeating deactivate code is programmed with the length limitation set by LBDL[1:0] bits.
LBDC[7:2] = 6-bit (or 3-bit) repeating deactivate code is programmed with the length limitation set by LBDL[1:0] bits.
LBDC[7:3] = 5-bit repeating deactivate code is programmed with the length limitation set by LBDL[1:0] bits.
e-LBS: Inband Loopback Receive Status Register (R, Expanded Address = 0BH)
Symbol
Position
Default
Description
LBS[7:0]
LBS.7-0
00H
0 = Normal operation (Default). Or loopback deactivation code detected.
1 = Loopback activation code detected.
e-LBM: Inband Loopback Interrupt Mask Register (R/W, Expanded Address = 0CH)
Symbol
Position
Default
Description
LBM[7:0]
LBM.7-0
00H
0 = LBI interrupt is not allowed (Default)
1 = LBI interrupt is allowed.
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