參數(shù)資料
型號(hào)： IDT82V2608BB
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi)： 數(shù)字傳輸電路
英文描述： INVERSE MULTIPLEXING FOR ATM
中文描述： ATM/SONET/SDH SUPPORT CIRCUIT, PBGA208
封裝： PLASTIC, BGA-208
文件頁(yè)數(shù)： 6/98頁(yè)
文件大?。?/td> 398K
代理商： IDT82V2608BB
List of Tables
6
December 4, 2006
List of T ables
Table-1
Table-2
Table-3
Table-4
Table-5
Table-6
Table-7
Table-8
Table-9
Table-10
Table-11
Table-12
Table-13
Table-14
Table-15
Table-16
Table-17
Table-18
Table-19
Table-20
Table-21
Table-22
Table-23
Table-24
Table-25
Table-26
Table-27
Table-28
Table-29
Table-30
Table-31
Table-32
Table-33
Table-34
Table-35
Table-36
Table-37
Table-38
Table-39
Table-40
Table-41
Pin Description............................................................................................................................................. 12
Data Rates of Different Modes..................................................................................................................... 20
Pins Used in Multi-Rate Multiplex Mode...................................................................................................... 22
Register Map................................................................................................................................................ 24
Input FIFO Data Length Register (INPUT_FIFO_LENGTH_REG).............................................................. 25
Output FIFO Data Length Register (OUTPUT_FIFO_LENGTH_REG)....................................................... 25
Output FIFO Data Register (OUTPUT_FIFO_DATA_REG)........................................................................ 25
Input FIFO Data Register (INPUT_FIFO_DATA_REG)............................................................................... 25
FIFO Interrupt Enable Register (FIFO_INT_ENABLE_REG)...................................................................... 26
FIFO Interrupt Status Register (FIFO_STATE_REG).................................................................................. 26
FIFO Interrupt Reset Register (FIFO_INT_RESET_REG).......................................................................... 26
Output FIFO Internal State Register (OUTPUT_FIFO_INTERNAL_STATE_REG)..................................... 26
Input FIFO Internal State Register (INPUT_FIFO_INTERNAL_STATE_REG)........................................... 27
MaximumDelay Tolerance Value for Different SRAM Size in T1 Unchannelized Mode............................. 29
MaximumDelay Tolerance Value for Different SRAMSize in E1 Unchannelized Mode............................. 29
Command Encoding.................................................................................................................................... 32
ConfigDev Command (Encoding: 01H)........................................................................................................ 33
ConfigUtopiaIF Command (Encoding: 03H)................................................................................................ 35
ConfigLoopMode Command (Encoding: 04H)............................................................................................. 36
ConfigGroupPara Command (Encoding: 05H)............................................................................................ 37
ConfigGroupInterFace Command (Encoding: 06H)..................................................................................... 39
ConfigGroupWorkMode Command (Encoding: 07H)................................................................................... 40
ConfigGSMTimers Command (Encoding: 08H)........................................................................................... 41
ConfigTRLLink Command (Encoding: 09H)................................................................................................. 42
ConfigIFSMPara Command (Encoding: 0AH)............................................................................................. 43
AddTxLink Command (Encoding: 0BH)....................................................................................................... 44
AddRxLink Command (Encoding: 0CH)...................................................................................................... 46
ConfigUNILink Command (Encoding: 0DH)................................................................................................. 47
StartGroup Command (Encoding: 0EH)...................................................................................................... 48
StartLASR Command (Encoding: 0FH)....................................................................................................... 49
InhibitGrp Command (Encoding: 10H)......................................................................................................... 50
NotInhibitGrp Command (Encoding: 11H)................................................................................................... 51
RestartGrp Command (Encoding: 12H)....................................................................................................... 52
DeleteGrp Command (Encoding: 13H)........................................................................................................ 53
RecoverLink Command (Encoding: 14H).................................................................................................... 54
DeleteLink Command (Encoding: 15H)....................................................................................................... 55
DeactLink Command (Encoding: 16H)........................................................................................................ 56
GetGroupState Command (Encoding: 17H)................................................................................................ 57
GetGroupDelayInfo Command (Encoding: 18H)......................................................................................... 58
GetLinkState Command (Encoding: 19H).................................................................................................... 59
GetGrpPerf Command (Encoding: 1AH)...................................................................................................... 60
相關(guān)PDF資料
PDF描述
IDT82V2608 INVERSE MULTIPLEXING FOR ATM
IDT82V3001A WAN PLL WITH SINGLE REFERENCE INPUT
IDT82V3001APV WAN PLL WITH SINGLE REFERENCE INPUT
IDT82V3002A WAN PLL WITH DUAL REFERENCE INPUTS
IDT82V3002APV WAN PLL WITH DUAL REFERENCE INPUTS
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IDT82V2608BBG 功能描述:IC INVERSE MUX 8CH ATM 208-BGA RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 專(zhuān)用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤(pán)（4x4） 包裝:帶卷 (TR) 安裝類(lèi)型:表面貼裝 產(chǎn)品目錄頁(yè)面:1015 (CN2011-ZH PDF) 其它名稱(chēng):296-25223-2
IDT82V2616 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:INVERSE MULTIPLEXING FOR ATM
IDT82V2616BB 功能描述:IC INVERSE MUX 16CH ATM 272-PBGA RoHS:否 類(lèi)別:集成電路 (IC) >> 接口 - 專(zhuān)用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤(pán)（4x4） 包裝:帶卷 (TR) 安裝類(lèi)型:表面貼裝 產(chǎn)品目錄頁(yè)面:1015 (CN2011-ZH PDF) 其它名稱(chēng):296-25223-2
IDT82V2616BBG 功能描述:IC INVERSE MUX 16CH ATM 272-PBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 專(zhuān)用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤(pán)（4x4） 包裝:帶卷 (TR) 安裝類(lèi)型:表面貼裝 產(chǎn)品目錄頁(yè)面:1015 (CN2011-ZH PDF) 其它名稱(chēng):296-25223-2
IDT82V3001A 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:WAN PLL WITH SINGLE REFERENCE INPUT
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