參數(shù)資料
型號(hào): IDT82V2608BB
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 數(shù)字傳輸電路
英文描述: INVERSE MULTIPLEXING FOR ATM
中文描述: ATM/SONET/SDH SUPPORT CIRCUIT, PBGA208
封裝: PLASTIC, BGA-208
文件頁數(shù): 9/98頁
文件大小: 398K
代理商: IDT82V2608BB
2006 Integrated Device Technology, Inc.
DSC-6227-4
The IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
9
December 4, 2006
Inverse Multiplexing for ATM
FEAT UR ES
!
Highlights
Provides API command set for convenient configuration and
operation. An embedded controller and a downloaded soft-
ware are used to interpret the commands. Functions can be
added by software upgrading.
Supports IMA group auto detect.
Supports link backup so that a backup link can be automati-
cally added when a previously configured link fails.
All the state machines are implemented in hardware.
Advanced cell buffer management algorithmto support ATM
QoS requirements.
!
Other Features
Accommodates up to 4 IMA logical groups.
Supports 8 T1/E1 channelized or unchannelized links.
Supports T1 ISDN links.
Supports MIXED mode: links not assigned to an IMA group
can be used in UNI mode.
Supports symmetrical and asymmetrical operation.
Supports Common Transmt Clock (CTC) and Independent
Transmt Clock (ITC) timng modes.
Provides 8 Utopia Level 2 8 bit cell level handshake MPHY
interface to ATMdevice.
Supports maximumlink delay tolerance of up to
212 ms
for E1
or 281 ms for T1 (when 512 KB external memory is used).
Provides parameters for MIB (Management Information
Base).
Supports dynamc addition/deletion of links to/froma working
IMA group.
Supports non-multiplexed Intel or Motorola mcroprocessor
interface.
Loopback capability at both TDMand Utopia ports.
Supports MVIP.
JTAG boundary scan meets IEEE 1149.1.
Package: 208 pin PBGA.
3.3V operation / 5V tolerant input.
APPLICAT IONS
DSLAMconcentrator
3G Wireless base station controller (NodeB) and Radio
Network Controller (RNC)
Integrated Access Devices (IAD)
S T ANDAR DS COMPLIANT
!
ATM-Forum
Utopia Level 2 Version 1.0, af-phy-0039.000, June 1995.
Inverse Multiplexing for ATMSpecification version 1.1, af-phy-
0086.001, March 1999.
Backward compatible with Inverse Multiplexing for ATMSpec-
ification version 1.0, af-phy-0086.000, September 1994.
DS1 Physical Layer Specification, af-phy-0016.000,
September 1994.
E1 Physical Interface Specification, af-phy-0064.000,
September 1996.
!
ITU-T
I.432 B-ISDN User Network Interface PHY specification.
G.804 ATMCell Mapping into Plesiochronous Digital Hier-
archy (PDH).
G.802 Inter-working between networks based on different
digital hierarchies and speech encoding laws.
I.610 B-ISDN operation and maintenance principles and func-
tions.
!
ANSI
ANSI T1.646-1995, Broadband-ISDN-Physical Layer Specifi-
cation for User-Network Interface Including DS1/ATM 1995.
!
MVIP
DES CRIPT ION
The 8-port IDT82V2608 is a feature-rich device that provides the
solution to implement IMA and UNI logical channels over T1 or E1 links
in all public or private UNI, NNI and B-ICI applications. The chip is
compliant with the ATMForumIMA specification v1.1 and backward
compatible with IMA specification v1.0.
In the chip architecture, up to 8 physically independent T1/E1
streams can be termnated through the utilization of most T1/E1 framers
and LIUs in the market, and up to 4 logical IMA groups (i.e., 4 data chan-
nels) can be supported at the same time. To interface with most popular
ATMlayer chips in the market, IDT82V2608 supports Utopia Level 2
MPHY cell level handshake 8-bit bus interface.
Through a well-defined API command set, IMA function can be easily
designed into various IMA systems and there is little necessity to access
a large amount of registers. A downloaded software is used to interpret
the command set and can be easily upgraded to meet specific require-
ment.
IDT82V2608
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