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參數(shù)資料
| 型號(hào)： | IDTCV174CPAG8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封裝： | GREEN, TSSOP-56 |
| 文件頁(yè)數(shù)： | 15/21頁(yè) |
| 文件大?。?/td> | 108K |
| 代理商： | IDTCV174CPAG8 |
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COMMERCIALTEMPERATURERANGE
IDTCV174C
PROGRAMMABLEFLEXPCCLOCKFORP4PROCESSOR
3
PIN DESCRIPTION
Pin #
Name
Type
Description
1
PCI0/CR#_A
I/O
33.33MHz/SRC0, 2 Differential clock output enable, control SRC0 and SRC2, 0 = enable. Mode is selected
by SMBus control register. Default is PCI clock mode
2VDD_PCI
PWR
3.3V
3
PCI1/CR#_B
I/O
33.33MHz/SRC1, 2 Differential clock output enable, control SRC1 and SRC4, 0 = enable. Mode is selected
by SMBus control register. Default is PCI clock mode
4
PCI2/LTE
I/O
33.33MHz. High = overclocking disabled. Power-on latch.
5
PCI3
OUT
33.33MHz
6
PCI4/SRC5_EN
I/O
33.33MHz. Pin 29, 30 mode selection. Power on latch, high = SRC5, low = CPU and PCI Stop#
7
PCIF5/ITP_EN
I/O
33.33MHz. Pin 38, 39 mode selection. Power on latch, high = CPU_ITP, low = SRC8
8VSS_PCI
GND
9VDD_48
PWR
3.3V
10
USB 48/FS_A
I/O
48MHz/ Frequency select, power on latch
11
VSS_48
GND
12
VDD_IO
PWR
0.8V
13
SRCT0/DOT96T
OUT
Differential output clock. SRC or DOT96. Mode selected by SMBus control register, default is SRC0
14
SRCC0/DOT96C
OUT
Differential output clock. SRC or DOT96. Mode selected by SMBus control register, default is SRC0
15
VSS_IO
GND
16
VDD_PLL3
PWR
3.3V
17
SRCT1/SE1
OUT
Differential or single end clock output. Mode selected by SMBus control register. Default is SRC1.
18
SRCC1/SE2
OUT
Differential or single end clock output. Mode selected by SMBus control register. Default is SRC1
19
VSS_PLL3
GND
20
VDD_PLL3_IO
PWR
0.8V
21
SRCT2/SATAT
OUT
Differentialoutputclock
22
SRCC2/SATAC
OUT
Differentialoutputclock
23
VSS_SRC
GND
24
SRCT3/CR#_C
I/O
SRC clock/ SRC differential clock output enable, control SRC0 and SRC2, 0 = enable. Mode selected by
SMBus control register. Default is SRC3.
25
SRCC3/CR#_D
I/O
SRC clock/ SRC differential clock output enable, control SRC1 and SRC4, 0 = enable. Mode selected by
SMBus control register. Default is SRC3..
26
VDD_SRC_IO
PWR
0.8V
27
SRCT4
OUT
Differentialoutputclock
28
SRCC4
OUT
Differentialoutputclock
29
CPU_Stop#/SRCC5
I/O
CPU stop, low = stop/ SRC clock. Mode selected by pin6, SRC5_EN.
30
PCI_Stop#/SRCT5
I/O
PCI stop, low = stop/ SRC clock. Mode selected by pin6, SRC5_EN.
31
VDD_SRC
PWR
3.3V
32
SRCC6
OUT
Differentialoutputclock
33
SRCT6
OUT
Differentialoutputclock
34
VSS_SRC
GND
35
SRCC7/CR#_E
I/O
SRCclock/SRCdifferentialclockoutputenable,controlSRC6,0=enable.ModeselectedbySMBuscontrol
register. Default is SRC7.
36
SRCT7/CR#_F
I/O
SRCclock/SRCdifferentialclockoutputenable,controlSRC8,0=enable.ModeselectedbySMBuscontrol
register. Default is SRC7.
37
VDD_SRC_IO
PWR
0.8V
38
SRCC8/CPU_ ITPC
OUT
SRC clock/CPU clock. Mode selected by pin7.
39
SRCT8/CPU_ ITPT
OUT
SRC clock/CPU clock. Mode selected by pin7.
40
IO_VOUT
OUT
V_IOadjustment
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| IDTCV174CPVG | 功能描述:IC FLEXPC CLK PROGR P4 56-SSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:FlexPC™ 標(biāo)準(zhǔn)包裝:28 系列:- 類型:時(shí)鐘/頻率發(fā)生器 PLL:是 主要目的:Intel CPU 服務(wù)器 輸入:時(shí)鐘 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:3:22 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:64-TFSOP （0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:64-TSSOP 包裝:管件 |
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