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| 型號(hào)： | IDTIDT71P79804267BQI |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | 18Mb Pipelined DDR⑩II SIO SRAM Burst of 2 |
| 中文描述： | 35.7流水線⑩二二氧化硅的DDR SRAM的爆裂2 |
| 文件頁(yè)數(shù)： | 8/23頁(yè) |
| 文件大?。?/td> | 641K |
| 代理商： | IDTIDT71P79804267BQI |
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6.42
8
IDT71P79204 (2Mx8-Bit), 71P79104 (2Mx9-Bit), 71P79804 (1Mx18-Bit) 71P79604 (512Kx36-Bit)
18 Mb DDR II SIO SRAM Burst of 2 Commercial and Industrial Temperature Ranges
Pin Configuration IDT71P79604 (512K x 36)
165-ball FBGA Pinout
TOP VIEW
1
2
3
4
5
6
7
8
9
10
11
A
CQ
V
SS/
SA
(4)
NC/
SA
(2)
R/W
BW
2
K
BW
1
LD
NC/
SA
(1)
V
SS/
SA
(3)
CQ
B
Q
27
Q
18
D
18
SA
BW
3
K
BW
0
SA
D
17
Q
17
Q
8
C
D
27
Q
28
D
19
V
SS
SA
SA
SA
V
SS
D
16
Q
7
D
8
D
D
28
D
20
Q
19
V
SS
V
SS
V
SS
V
SS
V
SS
Q
16
D
15
D
7
E
Q
29
D
29
Q
20
V
DDQ
V
SS
V
SS
V
SS
V
DDQ
Q
15
D
6
Q
6
F
Q
30
Q
21
D
21
V
DDQ
V
DD
V
SS
V
DD
V
DDQ
D
14
Q
14
Q
5
G
D
30
D
22
Q
22
V
DDQ
V
DD
V
SS
V
DD
V
DDQ
Q
13
D
13
D
5
H
Doff
V
REF
V
DDQ
V
DDQ
V
DD
V
SS
V
DD
V
DDQ
V
DDQ
V
REF
ZQ
J
D
31
Q
31
D
23
V
DDQ
V
DD
V
SS
V
DD
V
DDQ
D
12
Q
4
D
4
K
Q
32
D
32
Q
23
V
DDQ
V
DD
V
SS
V
DD
V
DDQ
Q
12
D
3
Q
3
L
Q
33
Q
24
D
24
V
DDQ
V
SS
V
SS
V
SS
V
DDQ
D
11
Q
11
Q
2
M
D
33
Q
34
D
25
V
SS
V
SS
V
SS
V
SS
V
SS
D
10
Q
1
D
2
N
D
34
D
26
Q
25
V
SS
SA
SA
SA
V
SS
Q
10
D
9
D
1
P
Q
35
D
35
Q
26
SA
SA
C
SA
SA
Q
9
D
0
Q
0
R
TDO
TCK
SA
SA
SA
C
SA
SA
SA
TMS
TDI
6432 tbl 12c
NOTES:
1. A9 is reserved for the 36Mb expansion address.
2. A3 is reserved for the 72Mb expansion address.
3. A10 is reserved for the 144Mb expansion address. This must be tied or driven to VSS on the 512K x 36 DDRII SIO Burst of 2 (71P79604)
devices.
4. A2 is reserved for the 288Mb expansion address. This must be tied or driven to VSS on the 512K x 36 DDRII SIO Burst of 2 (71P79604)
devices.
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