參數(shù)資料
型號: IMST425-X25S
元件分類: 32位微控制器
英文描述: 32-Bit Microprocessor
中文描述: 32位微處理器
文件頁數(shù): 62/74頁
文件大小: 563K
代理商: IMST425-X25S
IMS T400
/ 74
62
11
Transputer instruction set summary
11.1
Introduction
The Function Codes table 11.9(page 66) gives the basic function code set. Where the operand value is
less than 16, a single byteencodes the complete instruction. If the operand value is greaterthan 15, one
prefix instruction (pfix) is required for each additional four bits of the operand. If the operand is negative
the first prefix instruction will be nfix. Examples of prefix coding are given in table 11.1.
Mnemonic
ldc
ldc
is coded as
pfix
ldc
ldc
is coded as
pfix
pfix
ldc
ldc
Function code
#4
Memory code
#43
#3
#35
#3
#5
#987
#2
#4
#23
#45
#9
#8
#7
–31
#2
#2
#4
#29
#28
#47
( ldc #FFFFFFE1)
( ldc #FFE1)
is coded as
nfix
ldc
IMS T222, IMS T225
#1
#1
#6
#4
#61
#41
Table 11.1
prefix coding
Tables 11.10 to 11.30(pages 66–73) givedetails ofthe operation codes.Wherean operationcode is less
than 16(e.g.add operation code
05
),theoperationcanbestoredas a singlebytecomprisingtheoperate
function code
F
and theoperand(
5
intheexample).Whereanoperationcodeisgreaterthan15(e.g.ladd:
operation code
16
), the prefix function code
2
is used to extend the instruction.
Mnemonic
add
is coded as
opr
ladd
is coded as
pfix
opr
Function code
Memory code
#F5
( op. code #5)
add
#F
#F5
#21F6
( op. code #16)
#1
#6
#2
#F
#21
#F6
Table 11.2
operate coding
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