參數(shù)資料
型號(hào)： Intel387 dx
廠商： Intel Corp.
英文描述： DX Math Coprocessor(32位數(shù)學(xué)協(xié)處理器)
中文描述： 霉素?cái)?shù)學(xué)協(xié)處理器（32位數(shù)學(xué)協(xié)處理器）
文件頁(yè)數(shù)： 41/41頁(yè)
文件大?。?/td> 406K
代理商： INTEL387 DX
Intel387
TM
DX MATH COPROCESSOR
APPENDIX A
COMPATIBILITY BETWEEN
THE 80287 AND THE 8087
The 80286/80287 operating in Real-Address mode
will execute 8086/8087 programs without major
modification. However, because of differences in the
handling of numeric exceptions by the 80287 MCP
and the 8087 MCP, exception-handling routinesmay
need to be changed.
This appendix summarizes the differences between
the 80287 MCP and the 8087 MCP, and provides
details showing how 8086/8087 programs can be
ported to the 80286/80287.
1. The MCP signals exceptions through a dedicated
ERROR
Y
line to the 80286. The MCP error signal
does not pass through an interrupt controller (the
8087 INT signal does). Therefore, any interrupt-
controller-oriented instructions in numeric excep-
tion handlers for the 8086/8087 should be delet-
ed.
2. The 8087 instructions FENI/FNENI and FDISI/
FNDISI perform no useful function in the 80287. If
the 80287 encounters one of these opcodes in its
instruction stream, the instruction will effectively
be ignoredDnone of the 80287 internal states will
be updated. While 8086/8087 containing these
instructions
may
be
80286/80287, it is unlikely that the exception-
handling routines containing these instructions
will be completely portable to the 80287.
executed
on
the
3. Interrupt vector 16 must point to the numeric ex-
ception handling routine.
4. The ESC instruction address saved in the 80287
includes any leading prefixes before the ESC op-
code. The corresponding address saved in the
8087 does not include leading prefixes.
5. In Protected-Address mode, the format of the
80287’s saved instruction and address pointers is
different than for the 8087. The instruction op-
code is not saved in Protected modeDexception
handlers will have to retrieve the opcode from
memory if needed.
6. Interrupt 7 will occur in the 80286 when executing
ESC instructions with either TS (task switched) or
EM (emulation) of the 80286 MSW set (TS
e
1 or
EM
e
1). If TS is set, then a WAIT instruction will
also cause interrupt 7. An exception handler
should be included in 80286/80287 code to han-
dle these situations.
7. Interrupt 9 will occur if the second or subsequent
words of a floating-point operand fall outside a
segment’s size. Interrupt 13 will occur if the start-
ing address of a numeric operand falls outside a
segment’s size. An exception handler should be
included in 80286/80287 code to report these
programming errors.
8. Except for the processor control instructions, all
of the 80287 numeric instructions are automati-
cally synchronized by the 80286 CPUDthe 80286
automatically tests the BUSY
Y
line from the
80287 to ensure that the 80287 has completed its
previous instruction before executing the next
ESC instruction. No explicit WAIT instructions are
required to assure this synchronization. For the
8087 used with 8086 and 8088 processors, ex-
plicit WAITs are required before each numeric in-
struction to ensure synchronization. Although
8086/8087 programs having explicit WAIT in-
structions
will
execute
80286/80287 without reassembly, these WAIT in-
structions are unnecessary.
perfectly
on
the
9. Since the 80287 does not require WAIT instruc-
tions
before
each
numeric
ASM286 assembler does not automatically gener-
ate these WAIT instructions. The ASM86 assem-
bler, however, automatically precedes every ESC
instruction with a WAIT instruction. Although nu-
meric routines generated using the ASM86 as-
sembler will generally execute correctly on the
80286/80287, reassembly using ASM286 may re-
sult in a more compact code image.
instruction,
the
The processor control instructions for the 80287
may be coded using either a WAIT or No-WAIT
form of mnemonic. The WAIT forms of these in-
structions cause ASM286 to precede the ESC in-
struction with a CPU WAIT instruction, in the iden-
tical manner as does ASM86.
DATA SHEET REVISION REVIEW
The following list represents the key differences be-
tween this and the -003 versions of the Intel387
TM
Math Coprocessor Data Sheet. Please review this
summary carefully.
1. Corrected typographical errors.
2. Corrected clock ratio ‘‘PIN’’ name on Table 4.2c
to NUMCLK/CPUCLK.
A-1
41
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