參數(shù)資料
型號: IR3082M
廠商: International Rectifier
英文描述: XPHASE AMD OPTERON/ATHLON 64 CONTROL IC
中文描述: XPHASE AMD皓龍/速龍64控制IC
文件頁數(shù): 15/33頁
文件大?。?/td> 444K
代理商: IR3082M
IR3082
Page 15 of 15
12/17/04
Over Current Protection (OCP)
The current limit threshold is set by a resistor connected between the OCSET and VDAC pins. If the IIN pin voltage,
which is proportional to the average current plus DAC voltage, exceeds the OCSET voltage, the over-current
protection is triggered.
VID = 11111 Fault
VID code of 11111 will set the fault latch and disable the error amplifier. An 800ns delay is provided to prevent a
fault condition from occurring during Dynamic VID changes.
Power Good Output
The PWRGD pin is an open-collector output and should be pulled up to a voltage source through a resistor. During
soft start, the PWRGD remains low until the output voltage is in regulation and SS/DEL is above 3.83V. The
PWRGD pin becomes low if the fault latch is set. A high level at the PWRGD pin indicates that the converter is in
operation and has no fault, but does not ensure the output voltage is within the specification. Output voltage
regulation within the design limits can logically be assured however, assuming no component failure in the system.
Load Current Indicator Output
The IIN pin voltage represents the average current of the converter plus the DAC voltage. The load current can be
retrieved by subtracting the VDAC voltage from the IIN voltage.
System Reference Voltage (VBIAS)
The IR3082 supplies a 7.0V/5mA precision reference voltage from the VBIAS pin. The oscillator ramp trip points are
based on the VBIAS voltage so it should be used to program the Phase ICs phase delay to minimize phase errors.
Enable Input
Pulling the ENABLE pin below 1.27V sets the Fault Latch.
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