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參數(shù)資料
| 型號(hào)： | IR3651SPBF |
| 廠商： | International Rectifier |
| 英文描述： | HIGH VOLTAGE SYNCHRONOUS PWM BUCK CONTROLLER |
| 中文描述： | 高壓同步PWM降壓控制器 |
| 文件頁數(shù)： | 15/19頁 |
| 文件大?。?/td> | 397K |
| 代理商： | IR3651SPBF |
IR3651SP
b
F
10/11/2006
Feedback Compensation
The IR3651 is a voltage mode controller; the
control loop is a single voltage feedback path
including error amplifier and error comparator. To
achieve fast transient response and accurate
output regulation, a compensation circuit is
necessary. The goal of the compensation
network is to provide a closed loop transfer
function with the highest 0dB crossing frequency
and adequate phase margin (greater than 45
o
).
The output LC filter introduces a double pole, –
40dB/decade gain slope above its corner
resonant frequency, and a total phase lag of 180
o
(see figure 11). The resonant frequency of the LC
filter expressed as follows:
Figure 11 shows gain and phase of the LC filter.
Since we already have 180
o
phase shift just from
the output filter, the system risks being unstable.
The IR3651’s error amplifier is a differential-input
transconductance amplifier. The output is
available for DC gain control or AC phase
compensation.
The error amplifier can be compensated either in
typeII or typeIII compensation. When it is used in
typeII
compensation
properties of the error amplifier become evident
and can be used to cancel one of the output filter
poles. This will be accomplished with a series RC
circuit from Comp pin to ground as shown in
figure 12.
This method requires that the output capacitor
should have enough ESR to satisfy stability
requirements. In general the output capacitor’s
ESR generates a zero typically at 5kHz to 50kHz
which is essential for an acceptable phase
margin.
the
transconductance
-(11)
-
C
L
2
1
F
o
o
LC
=
π
Gain
F
LC
0dB
Phase
0
F
LC
-180
Frequency
Frequency
-40dB/decade
Fig. 11: Gain and Phase of LC filter
The ESR zero of the output capacitor is
expressed as follows:
1
F
ESR
*
π
V
O
The transfer function (Ve/Vo) is given by:
The (s) indicates that the transfer function varies
as a function of frequency. This configuration
introduces a gain and zero, expressed by:
The gain is determined by the voltage divider and
error amplifier’s transconductance gain.
First select the desired zero-crossover frequency
(Fo):
F
and
F
F
≤
>
Use the following equation to calculate R4:
Where:
V
in
= Maximum Input Voltage
V
osc
= Oscillator Ramp Voltage
F
o
= Crossover Frequency
F
ESR
= Zero Frequency of the Output Capacitor
F
LC
= Resonant Frequency of the Output Filter
R
8
and R
9
= Feedback Resistor Dividers
g
m
= Error Amplifier Transconductance
-(12)
-
C
ESR
2
o
*
=
Fig. 12: TypeII compensation network
and its asymptotic gain plot
-(13)
-
sC
C
3
sR
1
R
R
R
+
g
s
H
4
4
8
9
9
m
+
=
*
*
)
(
( )
s
[
]
-(14)
-
C
R
2
1
F
R
*
R
R
R
+
g
H
4
3
z
3
8
9
9
m
*
*
*
π
=
=
(
)
s
o
ESR
o
F
1/10
~
1/5
*
-(15)
-
g
R
F
V
R
R
*
F
F
V
R
m
9
2
LC
in
9
8
ESR
*
o
*
osc
3
)
(
*
*
+
=
Ve
V
REF
R
9
R
8
R
3
C
4
E/A
F
Z
H(s) dB
Frequency
Gain(dB)
Fb
Comp
C
POLE
15
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