參數(shù)資料
型號: IS45S16400C1-7TA1
廠商: INTEGRATED SILICON SOLUTION INC
元件分類: DRAM
英文描述: 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
中文描述: 4M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
封裝: 0.400 INCH, PLASTIC, TSOP2-54
文件頁數(shù): 5/55頁
文件大?。?/td> 504K
代理商: IS45S16400C1-7TA1
IS45S16400C1
ISSI
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
10/25/05
5
enabled or disabled. AUTO PRECHARGE does not apply
except in full-page burst mode. Upon completion of the
READ or WRITE burst, a precharge of the bank/row that
is addressed is automatically performed.
AUTO REFRESH COMMAND
This command executes the AUTO REFRESH operation.
The row address and bank to be refreshed are automatically
generated during this operation. The stipulated period (t
RC
)
is required for a single refresh operation, and no other
commands can be executed during this period. This com-
mand is executed at least 4096 times every 64ms. During
an AUTO REFRESH command, address bits are “Don’t
Care”. This command corresponds to CBR Auto-refresh.
SELF REFRESH
During the SELF REFRESH operation, the row address to
be refreshed, the bank, and the refresh interval are
generated automatically internally. SELF REFRESH can
be used to retain data in the SDRAM without external
clocking, even if the rest of the system is powered down.
The SELF REFRESH operation is started by dropping the
CKE pin from HIGH to LOW. During the SELF REFRESH
operation all other inputs to the SDRAM become “Don’t
Care”. The device must remain in self refresh mode for a
minimum period equal to t
RAS
or may remain in self refresh
mode for an indefinite period beyond that. The SELF-
REFRESH operation continues as long as the CKE pin
remains LOW and there is no need for external control of
any other pins. The next command cannot be executed until
the device internal recovery period (t
RC
) has elapsed. Once
CKE goes HIGH, the NOP command must be issued
(minimum of two clocks)
to provide time for the completion of
any internal refresh in progress. After the self-refresh, since
it is impossible to determine the address of the last row to
be refreshed, an AUTO-REFRESH should immediately be
performed for all addresses.
BURST TERMINATE
The BURST TERMINATE command forcibly terminates the
burst read and write operations by truncating either fixed-
length or full-page bursts and the most recently registered
READ or WRITE command prior to the BURST TERMI-
NATE.
COMMAND INHIBIT
COMMAND INHIBIT prevents new commands from being
executed. Operations in progress are not affected, apart
from whether the CLK signal is enabled
NO OPERATION
When
CS
is low, the NOP command prevents unwanted
commands from being registered during idle or wait
states.
LOAD MODE REGISTER
During the LOAD MODE REGISTER command the mode
register is loaded from A0-A11. This command can only
be issued when all banks are idle.
ACTIVE COMMAND
When the ACTIVE COMMAND is activated, BA0, BA1
inputs selects a bank to be accessed, and the address
inputs on A0-A11 selects the row. Until a PRECHARGE
command is issued to the bank, the row remains open for
accesses.
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參數(shù)描述
IS45S16400C1-7TLA 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
IS45S16400C1-7TLA1 制造商:Integrated Silicon Solution Inc 功能描述:
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IS45S16400E-6TLA1-TR 功能描述:動態(tài)隨機(jī)存取存儲器 64M (4Mx16) 166MHz S動態(tài)隨機(jī)存取存儲器 3.3v RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲容量:16 MB 最大時鐘頻率: 訪問時間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube