參數(shù)資料
型號(hào): IS45S16400C1-7TLA
廠商: INTEGRATED SILICON SOLUTION INC
元件分類: DRAM
英文描述: 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
中文描述: 4M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
封裝: 0.400 INCH, LEAD FREE, PLASTIC, TSOP2-54
文件頁(yè)數(shù): 12/55頁(yè)
文件大?。?/td> 504K
代理商: IS45S16400C1-7TLA
IS45S16400C1
ISSI
12
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
10/25/05
DC ELECTRICAL CHARACTERISTICS
(Recommended Operation Conditions unless otherwise noted.)
Symbol
I
IL
Parameter
Input Leakage Current
Test Condition
0V
V
IN
V
DD
, with pins other than
the tested pin at 0V
Output is disabled, 0V
V
OUT
V
DD
I
OUT
= –2 mA
I
OUT
= +2 mA
One Bank Operation,
CAS
latency = 3
Burst Length=1
t
RC
t
RC
(min.)
I
OUT
= 0mA
CKE
V
IL
(
MAX
)
Speed
Min.
–5
Max.
5
Unit
μA
I
OL
V
OH
V
OL
I
CC1
Output Leakage Current
Output High Voltage Level
Output Low Voltage Level
Operating Current
(1,2)
–5
2.4
5
0.4
85
145
μA
V
V
mA
mA
A
-7
-7
A1
I
CC2P
Precharge Standby Current
t
CK
= 15ns
A
-7
-7
2
4
1
3
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
A1
A
A1
I
CC2PS
(In Power-Down Mode)
t
CK
=
I
CC2N
(3)
I
CC2NS
Precharge Standby Current
(In Non Power-Down Mode)
CKE
V
IH
(
MIN
)
t
CK
= 15ns
t
CK
=
20
15
15
7
7
5
5
30
25
25
100
110
A
A1
A
A1
A
A1
I
CC3P
Active Standby Current
CKE
V
IL
(
MAX
)
t
CK
= 10ns
I
CC3PS
(In Power-Down Mode)
t
CK
=
I
CC3N
(3)
I
CC3NS
Active Standby Current
(In Non Power-Down Mode)
CKE
V
IH
(
MIN
)
t
CK
= 15ns
t
CK
=
A
A1
A
A1
I
CC4
Operating Current
(In Burst Mode)
(1)
t
CK
= t
CK
(
MIN
)
CAS
latency = 3
I
OUT
= 0mA
BL = 1
t
RC
= t
RC
(
MIN
)
CAS
latency = 3
t
CLK
= t
CLK
(
MIN
)
CKE
0.2V
I
CC5
Auto-Refresh Current
A
-7
-7
130
150
1
mA
mA
mA
A1
I
CC6
Notes:
1. These are the values at the minimum cycle time. Since the currents are transient, these values decrease as the cycle time
increases. Also note that a bypass capacitor of at least 0.01 μF should be inserted between V
DD
and GND for each memory
chip to suppress power supply voltage noise (voltage drops) due to these transient currents.
2. Icc
1
and Icc
4
depend on the output load. The maximum values for Icc
1
and Icc
4
are obtained with the output open state.
3. Input signal chnage once per 30ns.
Self-Refresh Current
相關(guān)PDF資料
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IS45S16400C1-7TLA1 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
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