參數(shù)資料
型號(hào)： IS61LPS51218A-250B2I
廠商： INTEGRATED SILICON SOLUTION INC
元件分類： DRAM
英文描述： 256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM
中文描述： 512K X 18 CACHE SRAM, 2.6 ns, PBGA119
封裝： 14 X 22 MM, 1 MM PITCH, PLASTIC, BGA-119
文件頁數(shù)： 23/32頁
文件大?。?/td> 217K
代理商： IS61LPS51218A-250B2I
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
04/29/05
23
IS61VPS25636A, IS61LPS25636A, IS61VPS51218A, IS61LPS51218A
ISSI
TAP Electrical Characteristics
Over the Operating Range
(1,2)
Symbol
Parameter
Test Conditions
Min.
Max.
Units
V
OH1
Output HIGH Voltage
I
OH
= –2.0 mA
1.7
—
V
V
OH2
Output HIGH Voltage
I
OH
= –100
μ
A
2.1
—
V
V
OL1
Output LOW Voltage
I
OL
= 2.0 mA
—
0.7
V
V
OL2
Output LOW Voltage
I
OL
= 100
μ
A
—
0.2
V
V
IH
Input HIGH Voltage
1.7
V
DD
+0.3
V
V
IL
Input LOW Voltage
–0.3
0.7
V
I
X
Input Leakage Current
V
SS
≤
V I
≤
V
DDQ
–10
10
μ
A
Notes:
1. All Voltage referenced to Ground.
2. Overshoot: V
IH
(AC)
≤
V
DD
+1.5V for t
≤
t
TCYC
/2,
Undershoot: V
IL
(AC)
≤
0.5V for t
≤
t
TCYC
/2,
Power-up: V
IH
< 2.6V and V
DD
< 2.4V and V
DDQ
< 1.4V for t < 200 ms.
TAP AC ELECTRICAL CHARACTERISTICS
(1,2)
(OVER OPERATING RANGE)
Symbol
Parameter
Min.
Max.
Unit
t
TCYC
TCK Clock cycle time
100
—
ns
f
TF
TCK Clock frequency
—
10
MHz
t
TH
TCK Clock HIGH
40
—
ns
t
TL
TCK Clock LOW
40
—
ns
t
TMSS
TMS setup to TCK Clock Rise
10
—
ns
t
TDIS
TDI setup to TCK Clock Rise
10
—
ns
t
CS
Capture setup to TCK Rise
10
—
ns
t
TMSH
TMS hold after TCK Clock Rise
10
—
ns
t
TDIH
TDI Hold after Clock Rise
10
—
ns
t
CH
Capture hold after Clock Rise
10
—
ns
t
TDOV
TCK LOW to TDO valid
—
20
ns
t
TDOX
TCK LOW to TDO invalid
0
—
ns
Notes:
1. Both t
CS
and t
CH
refer to the set-up and hold time requirements of latching data from the boundary scan register.
2. Test conditions are specified using the load in TAP AC test conditions. t
R
/t
F
= 1 ns.
相關(guān)PDF資料
PDF描述
IS61LPS51218A-250B3 256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM
IS61LPS51218A-250B3I 256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM
IS61LPS51218A-250TQ 256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM
IS61LPS51218A-250TQI 256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM
IS61LPS51236A-250B2 256K x 72, 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IS61LPS51218A-250B3 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM
IS61LPS51218A-250B3I 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM
IS61LPS51218A-250TQ 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM
IS61LPS51218A-250TQI 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM
IS61LPS51218B-200TQLI 功能描述:IC SRAM 9MBIT 200MHZ 100LQFP 制造商:issi, integrated silicon solution inc 系列:- 包裝:托盤 零件狀態(tài):在售 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 同步 存儲(chǔ)容量:9M（512K x 18） 速度:200MHz 接口:并聯(lián) 電壓 - 電源:3.135 V ~ 3.465 V 工作溫度:-40°C ~ 85°C（TA） 封裝/外殼:100-LQFP 供應(yīng)商器件封裝:100-LQFP（14x20） 標(biāo)準(zhǔn)包裝:72
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