參數(shù)資料
型號(hào): IS61LV12824-10B
廠商: INTEGRATED SILICON SOLUTION INC
元件分類: DRAM
英文描述: 128K x 24 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY
中文描述: 128K X 24 STANDARD SRAM, 10 ns, PBGA119
封裝: PLASTIC, BGA-119
文件頁(yè)數(shù): 1/13頁(yè)
文件大?。?/td> 77K
代理商: IS61LV12824-10B
IS61LV12824
128K x 24 HIGH-SPEED CMOS STATIC RAM
WITH 3.3V SUPPLY
ISSI
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
06/22/05
1
Copyright 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
FEATURES
High-speed access time: 8, 10 ns
CMOS low power operation
— 756 mW (max.) operating @ 8 ns
— 36 mW (max.) standby @ 8 ns
TTL compatible interface levels
Single 3.3V power supply
Fully static operation: no clock or refresh
required
Three state outputs
Available in 119-pin Plastic Ball Grid Array
(PBGA) and 100-pin TQFP packages.
Industrial temperature available
Lead-free available
DESCRIPTION
The
ISSI
IS61LV12824 is a high-speed, static RAM organized
as 131,072 words by 24 bits. It is fabricated using
ISSI
's high-
performance CMOS technology. This highly reliable process
coupled with innovative circuit design techniques, yields ac-
cess times as fast as 8 ns with low power consumption.
When
CE1
,
CE2
are HIGH and CE2 is LOW (deselected), the
device assumes a standby mode at which the power dissipa-
tion can be reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs,
CE1
, CE2,
CE2
and
OE
. The active
LOW Write Enable (
WE
) controls both writing and reading of
the memory.
The IS61LV12824 is packaged in the JEDEC standard
119-pin PBGA and 100-pin TQFP.
FUNCTIONAL BLOCK DIAGRAM
JUNE 2005
A0-A16
CE1
CE2
OE
WE
128K x 24
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
VCC
I/O
DATA
CIRCUIT
CE2
I/O0-I/O23
相關(guān)PDF資料
PDF描述
IS61LV12824-10BI 128K x 24 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY
IS61LV12824-10BL 128K x 24 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY
IS61LV12824-10TQ 128K x 24 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY
IS61LV12824-10TQI 128K x 24 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY
IS61LV12824-10TQLI 128K x 24 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IS61LV12824-10BI 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:128K x 24 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY
IS61LV12824-10BL 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 3Mb 128Kx24 10ns Async 靜態(tài)隨機(jī)存取存儲(chǔ)器 3.3v RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
IS61LV12824-10BL-TR 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 3Mb 128Kx24 10ns Async 靜態(tài)隨機(jī)存取存儲(chǔ)器 3.3v RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
IS61LV12824-10B-TR 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 3Mb 128Kx24 10ns Async 靜態(tài)隨機(jī)存取存儲(chǔ)器 3.3v RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
IS61LV12824-10TQ 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 3Mb 128Kx24 10ns Async 靜態(tài)隨機(jī)存取存儲(chǔ)器 3.3v RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray