參數(shù)資料
型號: IS62V6416BLL
廠商: Integrated Silicon Solution, Inc.
英文描述: 64K x 16 Low Voltage, Ultra Low Power CMOS SRAM(64K x 16 低壓,極低功耗CMOS靜態(tài)RAM)
中文描述: 64K的× 16低電壓,超低功耗CMOS SRAM(64K的× 16低壓,極低功耗的CMOS靜態(tài)RAM)的
文件頁數(shù): 1/11頁
文件大?。?/td> 89K
代理商: IS62V6416BLL
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
03/17/00
1
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any
errors which may appear in this publication. Copyright 2000, Integrated Silicon Solution, Inc.
IS62V6416BLL
64K x 16 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
ISSI
FEATURES
Access time: 100 and 120 ns
CMOS low power operation
TTL compatible interface levels
Single 2.7V-3.3V power supply
Fully static operation: no clock or refresh
required
Three state outputs
Data control for upper and lower bytes
Industrial temperature available
Available in Jedec Std 44-pin SOJ package,
44-pin TSOP (Type II), and 48-pin mini BGA
DESCRIPTION
The
ISSI
IS62V6416BLL is an ultra-low power, 1,048,576-bit
static RAM organized as 65,536 words by 16 bits. It is
fabricated using
ISSI
's high-performance CMOS technology.
This highly reliable process coupled with innovative circuit
design techniques yields access times as fast as 100 ns with
low power consumption.
When
CS
is HIGH (deselected) or when
CS
is LOW and both
LB
and
UB
are HIGH, the device assumes a standby mode at
which the power dissipation can be reduced down with CMOS
input levels.
Easy memory expansion is provided by using Chip Select and
Output Enable inputs,
CS
and
OE
. The active LOW Write
Enable (
WE
) controls both writing and reading of the memory.
A data byte allows Upper Byte (
UB
) and Lower Byte (
LB
) access.
FUNCTIONAL BLOCK DIAGRAM
MARCH 2000
A0-A15
CS
OE
WE
UB
LB
64K x 16
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
VCC
I/O
DATA
CIRCUIT
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
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