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參數(shù)資料
| 型號： | IS75V16F64GS16-7080DI |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | 存儲器 |
| 英文描述： | 64 Mbit FLASH MEMORY AND 16 Mbit PSEUDO SRAM STACKED MULTI-CHIP PACKAGE (MCP) |
| 中文描述： | SPECIALTY MEMORY CIRCUIT, PBGA65 |
| 封裝： | 9 X 9 MM, 0.80 MM PITCH, FBGA-65 |
| 文件頁數(shù)： | 5/50頁 |
| 文件大?。?/td> | 255K |
| 代理商： | IS75V16F64GS16-7080DI |
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Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
PRELIMINARY INFORMATION
Rev. 00A
08/01/02
5
75V16F64GS16
ISSI
Full Standby
Output Disable
(3)
H
H
L
L
L
H
H
L
H
H
H
L
H
X
X
X
X
H
X
H
H
L
H
L
X
H
H
H
L
H
X
X
X
X
X
X
L
H
L
X
X
X
X
X
X
L
L
H
High-Z
High-Z
High-Z
D
OUT
D
IN
D
OUT
D
IN
High-Z
D
IN
High-Z
High-Z
High-Z
D
OUT
D
IN
D
OUT
D
IN
D
IN
High-Z
H
H
H
H
H
H
X
X
X
X
X
X
Read from Flash
(4)
Write to Flash
Read from PSRAM
(5)
Write to PSRAM
H
L
H
H
L
H
X
Temporary
Sector
Group Unprotection
(6)
Flash Hardware
Reset
Boot Block
Sector Write
Protection
PSRAM Power Down
(8)
X
X
X
X
X
X
X
X
X
X
V
ID
X
X
H
H
X
X
X
X
High-Z
High-Z
L
X
X
X
X
X
X
X
X
X
X
X
L
X
L
X
X
X
X
X
X
X
X
Legend : L = VIL, H = VIH, X = VIL or VIH. See “DC CHARACTERISTICS” for voltage levels.
Notes:
1. Other operations not indicated in this table are prohibited.
2. Do not apply
CE
f = VIL,
CE
1r = VIL and CE2r = VIH all at once.
3. PSRAM Output Disable condition should not be kept longer than 1 ms.
4.
WE
can be VIL if
OE
is VIL,
OE
at VIH initiates the write operations.
5. PSRAM Byte control at Read operation is not supported.
6. Also used for the extended sector group protections.
7. Protects “outermost” 2 ′ 8 Kbytes (4 words) on both ends of the boot block sectors.
8. Power Down mode can be entered from Standby state and all DQ pins are in High-Z state.
DEVICE BUS OPERATIONS
OPERATION
(1,2)
CE
f
CE1
r
CE2r
OE
WE
LB
s
UB
s
DQ
7-
DQ
0
DQ
15
-DQ
8
RESET
WP
/ACC
(7)
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| IS76 | 制造商:IDEC CORPORATION 功能描述:SENS.IND. 10-30VDC PNP NO |
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| IS76L | 制造商:IDEC CORPORATION 功能描述:SENS.IND. 10-30VDC PNP NO |
| IS76S | 制造商:IDEC CORPORATION 功能描述:SENS.IND. 10-30VDC PNP NO |
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