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參數(shù)資料
| 型號： | ISL1219IUZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 23/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RTC LP BATT BACK SRAM 10MSOP |
| 產(chǎn)品培訓(xùn)模塊： | Solutions for Industrial Control Applications |
| 標(biāo)準(zhǔn)包裝： | 98 |
| 類型： | 時(shí)間事件記錄器 |
| 特點(diǎn)： | 警報(bào)器，閏年，SRAM |
| 存儲容量： | 2B |
| 時(shí)間格式： | HH:MM:SS（12/24 小時(shí)） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | I²C，2 線串口 |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 電壓 - 電源，電池： | 1.8 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-MSOP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1245 (CN2011-ZH PDF) |
8
FN6314.2
July 15, 2010
VBAT
This input provides a backup supply voltage to the device.
VBAT supplies power to the device in the event that the VDD
supply fails. This pin can be connected to a battery, a Super
Cap or tied to ground if not used.
EVIN (Event Input)
The EVIN pin is an input that is used to detect an externally
monitored event. When a high signal is present at the EVIN
pin, an “event” is detected. This input may be used for
various monitoring functions, such as the opening of a
detection switch on a chassis or door. The event detection
circuit can be user enabled or disabled (see EVEN bit) and
provides the option to be operational in battery backup
modes (see EVBATB bit). When the event detection is
disabled the EVIN pin is gated OFF. See “Functional
Description” on page 8 for more details.
EVDET (Event Detect Output)
The EVDET is an open drain output which will go low when
an event is detected at the EVIN pin. If the event detection
function is enabled, the EVDET output will go low and stay
low until the EVT bit is cleared (see EVIN pin description).
IRQ/FOUT (Interrupt Output/Frequency Output)
This dual function pin can be used as an interrupt or
frequency output pin. The IRQ/FOUT mode is selected via
the frequency out control bits of the control/status register.
Interrupt Mode. The pin provides an interrupt signal
output. This signal notifies a host processor that an alarm
has occurred and requests action. It is an open drain
active low output.
Frequency Output Mode. The pin outputs a clock signal
which is related to the crystal frequency. The frequency
output is user selectable and enabled via the I2C bus. It is
an open drain active low output.
Serial Clock (SCL)
The SCL input is used to clock all serial data into and out of
the device. The input buffer on this pin is always active (not
gated). It is disabled when the backup power supply on the
VBAT pin is activated to minimize power consumption.
Serial Data (SDA)
SDA is a bidirectional pin used to transfer data into and out
of the device. It has an open drain output and may be ORed
with other open drain or open collector outputs. The input
buffer is always active (not gated) in normal mode.
An open drain output requires the use of a pull-up resistor.
The output circuitry controls the fall time of the output signal
with the use of a slope controlled pull-down. The circuit is
designed for 400kHz I2C interface speeds. It is disabled
when the backup power supply on the VBAT pin is activated.
VDD, GND
Chip power supply and ground pins. The device will operate
with a power supply from VDD = 2.7V to 5.5VDC. A 0.1F
capacitor is recommended on the VDD pin to ground.
Functional Description
Power Control Operation
The power control circuit accepts a VDD and a VBAT input.
Many types of batteries can be used with Intersil RTC
products. For example, 3.0V or 3.6V Lithium batteries are
appropriate, and battery sizes are available that can power
the ISL1219 for up to 10 years. Another option is to use a
Super Cap for applications where VDD is interrupted for up
to a month. See the “Application Section” on page 20 for
more information.
Normal Mode (VDD) to Battery Backup Mode
(VBAT)
To transition from the VDD to VBAT mode, both of the
following conditions must be met:
Condition 1:
VDD < VBAT - VBATHYS
where VBATHYS ≈ 50mV
Condition 2:
VDD < VTRIP
where VTRIP ≈ 2.2V
Battery Backup Mode (VBAT) to Normal Mode
(VDD)
The ISL1219 device will switch from the VBAT to VDD mode
when one of the following conditions occurs:
Condition 1:
VDD > VBAT + VBATHYS
where VBATHYS ≈ 50mV
Condition 2:
VDD > VTRIP + VTRIPHYS
where VTRIPHYS ≈ 30mV
These power control situations are illustrated in Figures 11
and 12.
VBAT - VBATHYS
VBAT
VBAT + VBATHYS
BATTERY BACKUP
MODE
VDD
VTRIP
2.2V
1.8V
FIGURE 11. BATTERY SWITCHOVER WHEN VBAT < VTRIP
ISL1219
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|---|---|
| ISL1219IUZ-T | 功能描述:實(shí)時(shí)時(shí)鐘 REAL TIME CLKRTC IN RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| ISL1220 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:I2C㈢ Real Time Clock/Calendar with Frequency Output |
| ISL1220IUZ | 功能描述:實(shí)時(shí)時(shí)鐘 REAL TIME CLKRTC IN RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| ISL1220IUZ-T | 功能描述:實(shí)時(shí)時(shí)鐘 REAL TIME CLKRTC IN RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| ISL1221 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Power RTC with Battery Backed |
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