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參數(shù)資料
| 型號(hào)： | ISL33003MSOPEVAL1Z |
| 廠商： | Intersil |
| 文件頁數(shù)： | 12/18頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD ISL33003 8MSOP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 電源管理，熱交換控制器 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | ISL33003IUZ |
| 主要屬性： | 2 通道總線緩沖器 |
| 次要屬性： | I²C 接口 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | ISL33003IUZ-T-ND - IC BUS BUFF HOTSWAP 2WR 8MSOP ISL33003IRTZ-T-ND - IC BUS BUFF HOTSWAP 2WR 8TDFN ISL33003IRTZ-ND - IC BUS BUFF HOTSWAP 2WR 8TDFN ISL33003IRT2Z-T-ND - IC BUS BUFF HOTSWAP 2WR 8TDFN ISL33003IRT2Z-ND - IC BUS BUFF HOTSWAP 2WR 8TDFN ISL33003IUZ-ND - IC BUS BUFF HOTSWAP 2WR 8MSOP |
ISL33001, ISL33002, ISL33003
3
FN7560.5
December 19, 2013
ISL33003
(8 LD TDFN)
TOP VIEW
ISL33003
(8 LD MSOP)
TOP VIEW
Pin Descriptions
NAME
NOTES
PIN NUMBER
FUNCTION
VCC1
8VCC1 power supply, +2.3V to +5.5V. Decouple VCC1 to ground with a high frequency 0.01F
to 0.1F capacitor.
VCC2
ISL33002, ISL33003
1
VCC2 power supply, +2.3V to +5.5V. Decouple VCC2 to ground with a high frequency 0.01F
to 0.1F capacitor. In level shifting applications, SDA_OUT and SCL_OUT logic thresholds
are referenced to VCC2 supply levels. Connect pull-up resistors on these pins to VCC2.
GND
4
Device Ground Pin
EN
ISL33001
1
Buffer Enable Pin. Logic “0” disables the device. Logic “1” enables the device. Logic
threshold referenced to VCC1.
ISL33003
5
READY
ISL33001 only
5
Buffer active ‘Ready’ open drain logic output. When buffer is active, READY is high
impedance. When buffer is inactive, READY is low impedance to ground. Connect to 10k
pull-up resistor to VCC1.
ACC
ISL33002 only
5
Rise Time Accelerator Enable Pin. Logic “0” disables the accelerator. Logic “1” enables the
accelerator. Logic threshold referenced to VCC1.
SDA_IN
6
Data I/O Pins
SDA_OUT
7
SCL_IN
3
Clock I/O Pins
SCL_OUT
2
PAD
Thermal Pad; TDFN only
Thermal pad should be connected to ground or floated.
Pin Configurations (Continued)
3
2
1
GND 4
6
7
8
5
VCC1
EN
PAD
VCC2
SCL_IN
SCL_OUT
SDA_IN
SDA_OUT
6
7
8
5
3
2
1
4
VCC2
GND
VCC1
EN
SCL_IN
SCL_OUT
SDA_IN
SDA_OUT
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