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參數(shù)資料
| 型號(hào)： | ISL45042AIRZ-TK |
| 廠商： | Intersil |
| 文件頁(yè)數(shù)： | 5/8頁(yè) |
| 文件大小： | 0K |
| 描述： | IC LCD CALIBRATOR 8-TDFN |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 校準(zhǔn)器 |
| 應(yīng)用： | LCD 顯示器 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-WDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 8-TDFN（3x3） |
| 包裝： | 帶卷 (TR) |
5
FN6158.4
July 9, 2008
needed to program the non-volatile memory is given in
Figure 2. It then takes a maximum of 100ms for the
programming to be completed inside the device.
When the part is programmed, the counter setting is loaded
into the non-volatile memory. This value will be loaded from
the nonvolatile memory during initial power-up or when the
CE pin is pulled low.
Once the programming is completed, it is recommended that
the user float the CLT pin. The CTL pin is internally tied to a
resistor network connected to ground. If left floating, the
voltage at the CTL pin will equal VDD/2. Under these
conditions, no additional pulses will be seen by the Up/Down
counter via the CTL pin. To prevent further programming,
ground the CE pin.
CTL should have a noise filter to reduce bouncing or noise
on the input that could cause unwanted counting when the
CE pin is high. The board should have an additional ESD
protection circuit, with a series 1k
Ω resistor and a shunt
0.01F capacitor connected on the CTL pin, (see Figure 3).
To avoid unintentional adjustment, the ISL45042A
guarantees to reject CTL pulses shorter than 20s.
During Initial Power-up (only), to avoid the possibility of a
false pulse (since the internal comparators come up in an
unknown state), the very first CTL pulse is ignored. See
Figure 7 for the timing information.
CE Pin
To adjust the output voltage, the CE pin must be pulled high
(VDD). The CE pin has an internal pull-down resistor to
prevent unwanted reprogramming of the EEPROM. The
impedance of this resistor is 400k
Ω to 500kΩ (see
The CE pin has a Schmitt trigger on the input to prevent
false triggering during slow transitions of the CE pin.
Transitions of the CE pin are recommended to be less than
10s.
Replacing Existing Mechanical Potentiometer
Circuits
Figure 4 shows the common adjustment mechanical circuits
and equivalent replacement with the ISL45042A.
Expected Output Voltage
The ISL45042A provides an output sink current, which
lowers the voltage on the external voltage divider (VCOM
the output current (IOUT) and output voltage (VOUT) values.
NOTE: Where setting is an integer between 1 and 128.
CTL VOLTAGE
TIME
4.9V
CTLPT
FIGURE 2. EEPROM PROGRAMMING
>200s
I
OUT
Setting
128
--------------------- x
AV
DD
20 R
SET
()
---------------------------
=
V
OUT
R
2
R
1
R
2
+
---------------------
AV
DD 1
Setting
128
--------------------- x
R
1
20 R
SET
()
---------------------------
–
=
(EQ. 1)
(EQ. 2)
FIGURE 3. EXTERNAL ESD PROTECTION ON CTL PIN
ISL45042A
CTL
0.01F
1k
Ω
-
+
Ra
Rb
Rc
RSET
-
+
ISL45042A
SET
OUT
AVDD
R1
R2
AVDD
VCOM
AVDD
R1 = Ra
R2 = Rb + Rc
RSET = (Ra(Rb + Rc)) / 20Rb
FIGURE 4. EXAMPLE OF THE REPLACEMENT FOR THE MECHANICAL POTENTIOMETER CIRCUIT USING THE ISL45042A
ISL45042A
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| ISL45042IR | 功能描述:IC LCD MODULE CALIBRATOR 8-DFN RoHS:否 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動(dòng)電話，手機(jī)，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
| ISL45042IR-T | 功能描述:IC LCD MODULE CALIBRATOR 8-DFN RoHS:否 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動(dòng)電話，手機(jī)，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
| ISL45042IRZ | 功能描述:LCD 驅(qū)動(dòng)器 LCD MOD CALIBRATOR 8LD 3X3 THIN RoHS:否 制造商:Maxim Integrated 數(shù)位數(shù)量:4.5 片段數(shù)量:30 最大時(shí)鐘頻率:19 KHz 工作電源電壓:3 V to 3.6 V 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:PDIP-40 封裝:Tube |
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