參數(shù)資料
型號: ISL59446IRZ-T7
廠商: Intersil
文件頁數(shù): 13/13頁
文件大?。?/td> 0K
描述: IC AMP MUX 4:1 500MHZ 32-QFN
標(biāo)準(zhǔn)包裝: 1
應(yīng)用: 4:1 多路復(fù)用器-放大器
電路數(shù): 3
-3db帶寬: 620MHz
轉(zhuǎn)換速率: 1600 V/µs
電流 - 電源: 44mA
電流 - 輸出 / 通道: 135mA
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-QFN 裸露焊盤(5x6)
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面: 1235 (CN2011-ZH PDF)
其它名稱: ISL59446IRZ-T7DKR
9
FN6261.2
June 5, 2012
Pin Descriptions
ISL59446
(32 LD QFN)
PIN NAME
EQUIVALENT
CIRCUIT
DESCRIPTION
1
IN1A
Circuit 1
Channel 1 input for output amplifier "A"
2, 4, 8, 13, 15, 24,
28, 30
NIC
Not Internally Connected; it is recommended these pins be tied to ground to minimize
crosstalk.
3
IN1B
Circuit 1
Channel 1 input for output amplifier "B"
5
IN1C
Circuit 1
Channel 1 input for output amplifier "C"
6
GNDB
Circuit 4
Ground pin for output amplifier “B”
7
IN2A
Circuit 1
Channel 2 input for output amplifier "A"
9
IN2B
Circuit 1
Channel 2 input for output amplifier "B"
10
IN2C
Circuit 1
Channel 2 input for output amplifier "C"
11
GNDC
Circuit 4
Ground pin for output amplifier “C”
12
IN3A
Circuit 1
Channel 3 input for output amplifier "A"
14
IN3B
Circuit 1
Channel 3 input for output amplifier "B"
16
IN3C
Circuit 1
Channel 3 input for output amplifier "C"
17
S1
Circuit 2
Channel selection pin MSB (binary logic code)
18
S0
Circuit 2
Channel selection pin. LSB (binary logic code)
19
OUTC
Circuit 3
Output of amplifier “C”
20
OUTB
Circuit 3
Output of amplifier “B”
21
V-
Circuit 4
Negative power supply
22
OUTA
Circuit 3
Output of amplifier “A”
23
V+
Circuit 4
Positive power supply
25
ENABLE
Circuit 2
Device enable (active low). Internal pull-down resistor ensures device is active with no
connection to this pin. A logic High puts device into power-down mode and only the logic
circuitry is active. Logic states are preserved post power-down.
26
HIZ
Circuit 2
Output disable (active high). Internal pull-down resistor ensures the device will be active with
no connection to this pin. A logic high, puts the outputs in a high impedance state. Use this
state to control logic when more than one MUX-amp share the same video output line.
27
IN0C
Circuit 1
Channel 0 for output amplifier "C"
29
IN0B
Circuit 1
Channel 0 for output amplifier "B"
31
IN0A
Circuit 1
Channel 0 for output amplifier "A"
32
GNDA
Circuit 4
Ground pin for output amplifier “A”
IN
V+
V-
LOGIC PIN
V+
V-
GND
33k
21k
+
-
1.2V
V+
V-
OUT
CIRCUIT 3
CIRCUIT 1
CIRCUIT 2
V-
V+
GNDB
CAPACITIVELY
COUPLED
ESD CLAMP
GNDC
GNDA
CIRCUIT 4
V-
THERMAL HEAT SINK PAD
~1M
Ω
SUBSTRATE
ISL59446
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