FN7510.0 February 14, 2008 FIGURE 38. CONFIGURATION REGISTER READ A0 A7 A2 A4 A3 A1 A6 A5 1 00 1 0 0 R/W ISL59450 Register Address Write This s" />
參數(shù)資料
型號: ISL59450IQZ
廠商: Intersil
文件頁數(shù): 30/37頁
文件大?。?/td> 0K
描述: IC SWITCH VID CRSSPNT 128-MQFP
標(biāo)準(zhǔn)包裝: 66
系列: *
36
FN7510.0
February 14, 2008
FIGURE 38. CONFIGURATION REGISTER READ
A0
A7
A2
A4
A3
A1
A6
A5
1
00
1
0
0
R/W
ISL59450 Register Address Write
This sets the initial address of the ISL59450’s configuration
register for subsequent reading.
ISL59450 Serial Bus
START Command
Signals the beginning of serial I/O
ISL59450 Serial Bus Address Read
This is the 7-bit address of the ISL59450 on the 2-wire bus. The
address is 0x85 if pin 92 is low, 0x87 if pin 92 is high. R/W = 1,
indicating next transaction(s) will be a read.
D7
D6
D5
D2
D4
D3
D1
D0
ISL59450 Register Data Read(s)
This is the data read from the ISL59450’s configuration register.
Note: The ISL59450’s Configuration Register’s address pointer
auto increments after each data read. Repeat this step to read
multiple sequential bytes of data from the Configuration Register.
1
00
1
1
0
R/W
ISL59450 Serial Bus
START Command
STOP Command
(Repeat if desired)
Ends the previous transaction and starts a new one
Signals the ending of serial I/O
S
T
A
R
T
S
T
O
P
Data
Read*
SDA Bus
Signals from
the ISL59450
Signals from
the Host
Register
Address
Serial Bus
Address
A
C
K
AAAAAAAA
A
C
K
dddddddd
A
C
K
aaaaaaa0
* The data read step may be repeated to read
from the ISL59450’s Configuration Register
sequentially, beginning at the Register
Address written in the two previous steps.
R
E
S
T
A
R
T
Serial Bus
Address
A
C
K
aaaaaaa1
ISL59450 Device Select Address Write
The first 7 bits of the first byte select the ISL59450 on the 2-wire
bus at the address set by the Address pin. R/W = 0, indicating
the next transaction will be a write.
Address
0
Address
0
ISL59450
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