參數(shù)資料
型號: ISL6315
廠商: Intersil Corporation
英文描述: Two-Phase Multiphase Buck PWM Controller with Integrated MOSFET Drivers(帶集成MOSFET驅(qū)動(dòng)器的雙相降壓PWM控制器)
中文描述: 兩相多相降壓PWM控制器,具有集成MOSFET驅(qū)動(dòng)器(帶集成MOSFET的驅(qū)動(dòng)器的雙相降壓的PWM控制器)
文件頁數(shù): 17/20頁
文件大?。?/td> 394K
代理商: ISL6315
17
FN9222.1
July 18, 2007
is important to have a symmetrical layout, preferably with the
controller equidistantly located from the two power trains it
controls. Equally important are the gate drive lines (UGATE,
LGATE, PHASE): since they drive the power train MOSFETs
using short, high current pulses, it is important to size them
accordingly and reduce their overall impedance. Equidistant
placement of the controller to the two power trains also helps
keeping these traces equally long (equal impedances,
resulting in similar driving of both sets of MOSFETs).
The power components should be placed first. Locate the
input capacitors close to the power switches. Minimize the
length of the connections between the input capacitors, C
IN
,
and the power switches. Locate the output inductors and
output capacitors between the MOSFETs and the load.
Locate the high-frequency decoupling capacitors (ceramic)
as close as practicable to the decoupling target, making use
of the shortest connection paths to any internal planes, such
as vias to GND immediately next, or even onto the capacitor
solder pad.
The critical small components include the bypass capacitors
for VCC and PVCC. Locate the bypass capacitors, C
BP
,
close to the device. It is especially important to locate the
components associated with the feedback circuit close to
their respective controller pins, since they belong to a high-
impedance circuit loop, sensitive to EMI pick-up. It is
important to place the R
ISEN
resistor close to the respective
terminal of the ISL6315.
A multi-layer printed circuit board is recommended. Figure 10
shows the connections of the critical components for one
output channel of the converter. Note that capacitors C
xxIN
and C
xxOUT
could each represent numerous physical
capacitors. Dedicate one solid layer, usually the one
underneath the component side of the board, for a ground
VIA CONNECTION TO GROUND PLANE
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT PLANE LAYER
KEY
LOCATE CLOSE TO IC
(MINIMIZE CONNECTION PATH)
FIGURE 10. PRINTED CIRCUIT BOARD POWER PLANES AND ISLANDS
LOCATE NEAR LOAD;
(MINIMIZE CONNECTION PATH)
ISL6315
+12V
IN
Q1
Q2
Q3
Q4
VID4
VID3
VID2
VID1
VID0
COMP
FB
GND
VCC
BOOT1
BOOT2
UGATE1
UGATE2
ISEN
LGATE1
LGATE2
L
IN
L
OUT1
(C
HFIN1
)
C
BIN1
(C
HFIN2
)
C
BIN2
C
BOOT1
C
BOOT2
L
OUT2
(C
HFOUT
)
C
BOUT
R
ISEN
R
2
R
1
C
1
C
2
(C
F1
)
PHASE1
PHASE2
V
OUT
PGND
PVCC
(C
F2
)
+5V
IN
DACSEL/VID12
VRM10
SSEND
ENLL
OFS
R
OFS
R’
OFS
HEAVY TRACE ON CIRCUIT PLANE LAYER
LOCATE NEAR SWITCHING TRANSISTORS;
(MINIMIZE CONNECTION PATH)
ISL6315
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