參數(shù)資料
型號(hào)： ISL6556ACR
廠商： INTERSIL CORP
元件分類： 穩(wěn)壓器
英文描述： Optimized Multi-Phase PWM Controller with 6-Bit DAC for VR10.X Application
中文描述： SWITCHING CONTROLLER, 1500 kHz SWITCHING FREQ-MAX, PQCC32
封裝： 5 X 5 MM, PLASTIC, MO-220VHHD-2, QFN-32
文件頁(yè)數(shù)： 12/24頁(yè)
文件大小： 702K
代理商： ISL6556ACR
12
Channel-Current Balance
The sampled current, I
n
, from each active channel is used to
gauge both overall load current and the relative channel
current carried in each leg of the converter. The individual
sample currents are summed and divided by the number of
active channels. The resulting average current, I
AVG
,
provides a measure of the total load current demand on the
converter and the appropriate level of channel current. Using
Figures 3 and 4, the average current is defined as
where N is the number of active channels and I
OUT
is the
total load current.
The average current is subtracted from the individual
channel sample currents. The resulting error current, I
ER
, is
filtered to modify V
COMP
. The modified V
COMP
signal is
compared to a sawtooth ramp signal to produce a modified
pulse width which corrects for any unbalance and drives the
error current toward zero. Figure 4 illustrates Intersil’s
patented current-balance method as implemented on
channel-1 of a multi-phase converter.
Two considerations designers face are MOSFET selection
and inductor design. Both are significantly improved when
channel currents track at any load level. The need for
complex drive schemes for multiple MOSFETs, exotic
magnetic materials, and expensive heat sinks is avoided,
resulting in a cost-effective and easy-to-implement solution
relative to single-phase conversion. Channel-current
balance insures that the thermal advantage of multi-phase
conversion is realized. Heat dissipation in multiple channels
is spread over a greater area than can easily be
accomplished using the single phase approach.
In some circumstances, it may be necessary to deliberately
design some channel-current unbalance into the system. In
a highly compact design, one or two channels may be able
to cool more effectively than the other(s) due to nearby air
flow or heat sinking components. The other channel(s) may
have more difficulty cooling with comparatively less air flow
and heat sinking. The hotter channels may also be located
close to other heat-generating components tending to drive
their temperature even higher. In these cases, the proper
selection of the current sense resistors (R
ISEN
in Figure 3)
introduces channel current unbalance into the system.
Increasing the value of R
ISEN
in the cooler channels and
decreasing it in the hotter channels moves all channels into
thermal balance at the expense of current balance.
Voltage Regulation
The integrating compensation network shown in Figure 5
assures that the steady-state error in the output voltage is
limited only to the error in the reference voltage (output of
the DAC) and offset errors in the OFS current source,
remote-sense and error amplifiers. Intersil specifies the
guaranteed tolerance of the ISL6556A to include the
combined tolerances of each of these elements.
The output of the error amplifier, V
COMP
, is compared to the
sawtooth waveform to generate the PWM signals. The PWM
signals control the timing of the Intersil MOSFET drivers and
regulate the converter output to the specified reference
voltage. The internal and external circuitry that controls
voltage regulation is illustrated in Figure 5.
The ISL6556A incorporates an internal differential remote-
sense amplifier in the feedback path. The amplifier removes
the voltage error encountered when measuring the output
voltage relative to the local controller ground reference point
resulting in a more accurate means of sensing output
voltage. Connect the microprocessor sense pins to the non-
(EQ. 4)
I
AVG
I
------------------N
I
…
I
N
+
+
+
=
I
AVG
I
N
-------------
r
R
ISEN
)
----------------------
=
FIGURE 4. CHANNEL-1 PWM FUNCTION AND CURRENT-
BALANCE ADJUSTMENT
÷
N
I
AVG
I
4
*
I
3
*
I
2
Σ
-
+
+
-
+
-
f(j
ω
)
PWM1
I
1
V
COMP
SAWTOOTH SIGNAL
I
ER
NOTE: *Channels 3 and 4 are optional.
FIGURE 5. OUTPUT VOLTAGE AND LOAD-LINE
REGULATION WITH OFFSET ADJUSTMENT
I
AVG
EXTERNAL CIRCUIT
R
C
C
C
ISL6556A INTERNAL CIRCUIT
COMP
R
FB
FB
VDIFF
VSEN
RGND
-
+
V
DROOP
ERROR AMPLIFIER
-
+
V
OUT
+
DIFFERENTIAL
REMOTE-SENSE
AMPLIFIER
V
COMP
REF
DAC
R
REF
C
REF
-
+
V
OUT
-
ISL6556A
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ISL6556ACRZ-T 功能描述:IC CTRLR MULTIPHASE VRM10 32-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 標(biāo)準(zhǔn)包裝:43 系列:- 應(yīng)用:控制器，Intel VR11 輸入電壓:5 V ~ 12 V 輸出數(shù):1 輸出電壓:0.5 V ~ 1.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-QFN（7x7） 包裝:管件
ISL6556ACRZ-TR5208 制造商:Rochester Electronics LLC 功能描述: 制造商:Intersil Corporation 功能描述:
ISL6556BCB 功能描述:IC CTRLR MULTIPHASE VRM10 28SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,000 系列:- 應(yīng)用:電源，ICERA E400，E450 輸入電壓:4.1 V ~ 5.5 V 輸出數(shù):10 輸出電壓:可編程 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:42-WFBGA，WLCSP 供應(yīng)商設(shè)備封裝:42-WLP 包裝:帶卷 (TR)
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